Z8018010PSG Zilog, Z8018010PSG Datasheet - Page 46

• Manufacturer Part Number: Z8018010PSG
• Description: IC 10MHZ Z180 CMOS ENH MPU 64DIP
• Manufacturer: Zilog

Specifications of Z8018010PSG

• Processor Type: Z180
• Features: 8-Bit, Enhanced Z80 Megacell
• Speed: 10MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 64-DIP (0.750", 19.05mm)
• Processor Series: Z8018xx
• Core: Z80
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 10 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: 0 C
• Core Size: 8bit
• Cpu Speed: 10MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 64
• Supply Voltage Range: 4.5V To 5.5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 8018010
• Rohs Compliant: Yes
• Clock Frequency: 10MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3889; Z8018010PSG

HALT and Low Power Operation Modes (Z80180-Class
Also, the WAIT input is ignored during RESET. For example, if RESET
is detected while the Z8X180 is in a Wait State (TW), the Wait Stated
cycle in progress is aborted, and the RESET sequence initiated. Thus,
RESET has higher priority than WAIT.
The Z80180 can operate in two different modes:
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•
and two low-power operation modes:
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In all operating modes, the basic CPU clock (XTAL, EXTAL) must
remain active.
HALT Mode
HALT mode is entered by execution of the HALT instruction (Op Code
76H
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•
•
•
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IOSTOP mode
SLEEP
SYSTEM STOP
) and has the following characteristics:
The internal CPU clock remains active
All internal and external interrupts can be received
Bus exchange (BUSREQ and BUSACK) can occur
Dynamic RAM refresh cycle (RFSH) insertion continues at the
programmed interval
I/O operations (ASCI, CSI/O and PRT) continue
The DMAC can operate
HALT mode
Processors Only)
Family MPU User Manual
UM005003-0703
Z8018x
31