Z8018010PSG Zilog, Z8018010PSG Datasheet - Page 165

• Manufacturer Part Number: Z8018010PSG
• Description: IC 10MHZ Z180 CMOS ENH MPU 64DIP
• Manufacturer: Zilog

Specifications of Z8018010PSG

• Processor Type: Z180
• Features: 8-Bit, Enhanced Z80 Megacell
• Speed: 10MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 64-DIP (0.750", 19.05mm)
• Processor Series: Z8018xx
• Core: Z80
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 10 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: 0 C
• Core Size: 8bit
• Cpu Speed: 10MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 64
• Supply Voltage Range: 4.5V To 5.5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 8018010
• Rohs Compliant: Yes
• Clock Frequency: 10MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3889; Z8018010PSG

150
CSI/O Transmit/Receive Register (TRDR: 0BH)
UM005003-0703
Bit
Bit/Field
R/W
Reset
Note: R = Read W = Write X = Indeterminate ? = Not Applicable
Z8018x
Family MPU User Manual
7
Table 22.
After RESET, the CKS pin is configured as an external clock input (SS2,
SS1, SS0 = 1). Changing these values causes CKS to become an output pin
and the selected clock is output when transmit or receive operations are
enabled.
CSI/O Interrupts
The CSI/O interrupt request circuit is shown in Figure 58.
Note: ( ) indicates the baud rate (BPS) at Phi = 4 MHz.
SS2
0
0
0
0
1
1
1
1
6
CSI/O Baud Rate Selection
SS1
0
0
1
1
0
0
1
1
5
CSI/O Transmit/Receive Data
SS0
0
1
0
1
0
1
0
1
4
Divide Ratio
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External Clock input (less than
R/W
20
40
80
160
320
640
1280
0
3
2
Baud Rate
(200000)
(100000)
(50000)
(25000)
(12500)
(6250)
(3125)
1
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20)
0