LPC1343FHN33,551 NXP Semiconductors, LPC1343FHN33,551 Datasheet - Page 13

• Manufacturer Part Number: LPC1343FHN33,551
• Description: IC MCU 32BIT 32KB FLASH 33HVQFN
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1343FHN33,551

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 33-VQFN Exposed Pad, 33-HVQFN, 33-SQFN, 33-DHVQFN
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 28
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 28
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, KSK-LPC1343
• Development Tools By Supplier: OM11039, OM11040, OM11046, OM11048
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 33HVQFN EP
• Device Core: ARM Cortex M3
• Family Name: LPC1000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4944; 935289655551

NXP Semiconductors
Table 5.
UM10375
User manual
Name
SYSMEMREMAP
PRESETCTRL
SYSPLLCTRL
SYSPLLSTAT
USBPLLCTRL
USBPLLSTAT
-
SYSOSCCTRL
WDTOSCCTRL
IRCCTRL
-
SYSRESSTAT
-
SYSPLLCLKSEL
SYSPLLCLKUEN
USBPLLCLKSEL
USBPLLCLKUEN
-
MAINCLKSEL
MAINCLKUEN
SYSAHBCLKDIV
-
SYSAHBCLKCTRL
-
SSPCLKDIV
UARTCLKDIV
-
TRACECLKDIV
SYSTICKCLKDIV
-
USBCLKSEL
USBCLKUEN
USBCLKDIV
-
WDTCLKSEL
WDTCLKUEN
WDTCLKDIV
-
CLKOUTCLKSEL
CLKOUTUEN
CLKOUTDIV
Register overview: system control block (base address 0x4004 8000)
Access
R/W
R/W
R/W
R
R/W
R
-
R/W
R/W
R/W
-
R
-
R/W
R/W
R/W
R/W
-
R/W
R/W
R/W
-
R/W
-
R/W
R/W
-
R/W
R/W
-
R/W
R/W
R/W
-
R/W
R/W
R/W
-
R/W
R/W
R/W
Address offset Description
0x000
0x004
0x008
0x00C
0x010
0x014
0x018 - 0x01C
0x020
0x024
0x028
0x02C
0x030
0x034 - 0x03C
0x040
0x044
0x048
0x04C
0x050 - 0x06C
0x070
0x074
0x078
0x07C
0x080
0x084 - 0x090
0x094
0x098
0x09C - 0x0A8
0x0AC
0x0B0
0x0B4 - 0x0BC
0x0C0
0x0C4
0x0C8
0x0CC
0x0D0
0x0D4
0x0D8
0x0DC
0x0E0
0x0E4
0x0E8
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 July 2010
System memory remap
Peripheral reset control
USB PLL control
Reserved
System oscillator control
Watchdog oscillator control
IRC control
Reserved
Reserved
System PLL clock source select
System PLL clock source update enable
USB PLL clock source update enable
Reserved
Main clock source select
Main clock source update enable
Reserved
Reserved
SSP clock divder
UART clock divder
Reserved
ARM trace clock divider
SYSTICK clock divder
Reserved
USB clock source select
USB clock source update enable
USB clock source divider
WDT clock source update enable
WDT clock divider
CLKOUT clock source select
CLKOUT clock source update enable
CLKOUT clock divider
System PLL control
System PLL status
USB PLL status
System reset status register
USB PLL clock source select
System AHB clock divider
System AHB clock control
Reserved
WDT clock source select
Reserved
Chapter 3: LPC13xx System configuration
Reset value
0x0000 0002
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
-
0x0000 0000
0x0000 0000
0x0000 0080
-
0x0000 0000
-
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
-
0x0000 0000
0x0000 0000
0x0000 0001
-
0x0000 485F
-
0x0000 0001
0x0000 0000
-
0x0000 0000
0x0000 0000
-
0x0000 0000
0x0000 0000
0x0000 0001
-
0x0000 0000
0x0000 0000
0x0000 0000
-
0x0000 0000
0x0000 0000
0x0000 0000
UM10375
© NXP B.V. 2010. All rights reserved.
Reference
Table 6
Table 7
Table 8
Table 9
Table 10
Table 11
-
Table 12
Table 13
Table 14
-
Table 15
-
Table 16
Table 17
Table 18
Table 19
-
Table 20
Table 21
Table 22
-
Table 23
-
Table 24
Table 25
-
Table 26
Table 27
-
Table 28
Table 29
Table 30
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Table 31
Table 32
Table 33
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Table 34
Table 35
Table 36
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