LPC1343FHN33,551 NXP Semiconductors, LPC1343FHN33,551 Datasheet - Page 134
LPC1343FHN33,551
Manufacturer Part Number
LPC1343FHN33,551
Description
IC MCU 32BIT 32KB FLASH 33HVQFN
Manufacturer
NXP Semiconductors
Series
LPC13xxr
Specifications of LPC1343FHN33,551
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
33-VQFN Exposed Pad, 33-HVQFN, 33-SQFN, 33-DHVQFN
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
28
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC13
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, UART
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
28
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, KSK-LPC1343
Development Tools By Supplier
OM11039, OM11040, OM11046, OM11048
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
33HVQFN EP
Device Core
ARM Cortex M3
Family Name
LPC1000
Maximum Speed
72 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4944
935289655551
935289655551
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1343FHN33,551
Manufacturer:
NXP
Quantity:
780
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NXP Semiconductors
UM10375
User manual
9.10.2.2 USB Command Data register (USBCmdData - 0x4002 0014)
9.10.3.1 USB Receive Data register (USBRxData - 0x4002 0018)
9.10.3.2 USB Transmit Data register (USBTxData - 0x4002 021C)
9.10.3 USB data transfer registers
Table 160. USB Command Code register (USBCmdCode - address 0x4002 0010) bit
This register contains the data retrieved after executing a SIE command. When the data is
ready to be read, the CD_FULL bit of the USBDevIntSt register is set. See
details. USBCmdData is a read only register.
Table 161. USB Command Data register (USBCmdData - address 0x4002 0014) bit
The registers in this group are used for transferring data between endpoint buffers and
RAM in Slave mode operation. See
For an OUT transaction, the CPU reads the endpoint buffer data from this register. Before
reading this register, the RD_EN bit and LOG_ENDPOINT field of the USBCtrl register
should be set appropriately. On reading this register, data from the selected endpoint
buffer is fetched. The data is in little endian format: the first byte received from the USB
bus will be available in the least significant byte of USBRxData. USBRxData is a read only
register.
Table 162. USB Receive Data register (USBRxData - address 0x4002 0018) bit description
For an IN transaction, the CPU writes the endpoint data into this register. Before writing to
this register, the WR_EN bit and LOG_ENDPOINT field of the USBCtrl register should be
set appropriately, and the packet length should be written to the USBTxPlen register. On
Bit
23:16 CMD_CODE/
31:24 -
Bit
7:0
31:8
Bit
31:0
Symbol
CMD_WDATA
Symbol
CMD_RDATA
-
Symbol
RX_DATA
description
description
All information provided in this document is subject to legal disclaimers.
Value
0x01
0x02
0x05
-
Description
Data received.
Description
Command Read Data.
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
Rev. 2 — 7 July 2010
Description
Write
Read
Command
This is a multi-purpose field. When CMD_PHASE is
Command or Read, this field contains the code for
the command (CMD_CODE). When CMD_PHASE
is Write, this field contains the command write data
(CMD_WDATA).
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
Section 9.13 “Functional
Chapter 9: LPC13xx USB device controller
description”.
UM10375
© NXP B.V. 2010. All rights reserved.
Table 155
Reset value
0x0000 0000
Reset value
0x00
NA
Reset
value
0x00
NA
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