D12332VFC20V Renesas Electronics America, D12332VFC20V Datasheet - Page 1076

• Manufacturer Part Number: D12332VFC20V
• Description: IC H8S/2332 MCU ROMLESS 144QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12332VFC20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

BCRL—Bus Control Register L
Rev.4.00 Sep. 07, 2007 Page 1044 of 1210
REJ09B0245-0400
Bit
Initial value
Read/Write
:
:
:
BRLE
Bus Release Enable
R/W
7
0
0
1
External bus release disabled
External bus release enabled
BREQOE
R/W
Note: * BREQO output pin can be switched between
BREQO Pin Enable
6
0
0
1
BREQO* output disabled
BREQO* output enabled
Notes: 1. Do not access a reserved area.
PF
External Address Enable
0
1
EAE
R/W
2
5
1
and P5
• In the H8S/2339 and H8S/2338, addresses H'010000 to H'03FFFF*
• In the H8S/2337, addresses H'010000 to H'01FFFF are on-chip ROM,
• Addresses H'010000 to H'03FFFF*
• Reserved area*
expanded mode
are on-chip ROM
and addresses H'020000 to H'03FFFF are a reserved area*
2. Addresses H'010000 to H'05FFFF in the H8S/2339.
3
by means of BREQOPS.
Reserved
R/W
—
4
0
DACK Timing Select
0
1
1
DDS
R/W
in single-chip mode
When DMAC single address transfer is performed in
DRAM space, full access is always executed. DACK
signal goes low from Tr or T1 cycle
Burst access is possible when DMAC single address
transfer is performed in DRAM space. DACK signal
goes low from Tc1 or T2 cycle
3
1
Reserved
H'FED5
R/W
—
2
1
Write Data Buffer Enable
0
1
2
are external addresses in external
WAIT Pin Enable
Note: * The WAIT input pin can be switched
Write data buffer function not used
Write data buffer function used
WDBE
0
1
R/W
1
0
Wait input by WAIT* pin disabled
Wait input by WAIT* pin enabled
between P8
of WAITPS.
WAITE
R/W
0
0
6
and P5
1
Bus Controller
3
by means
2