D12332VFC20V Renesas Electronics America, D12332VFC20V Datasheet - Page 28

• Manufacturer Part Number: D12332VFC20V
• Description: IC H8S/2332 MCU ROMLESS 144QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12332VFC20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

19.14 Register Descriptions ........................................................................................................ 799
19.15 On-Board Programming Modes........................................................................................ 807
19.16 Programming/Erasing Flash Memory ............................................................................... 815
19.17 Flash Memory Protection.................................................................................................. 820
19.18 Flash Memory Emulation in RAM ................................................................................... 823
19.19 Interrupt Handling when Programming/Erasing Flash Memory....................................... 825
19.20 Flash Memory PROM Mode............................................................................................. 826
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19.13.4 On-Board Programming Modes........................................................................... 792
19.13.5 Flash Memory Emulation in RAM ...................................................................... 794
19.13.6 Differences between Boot Mode and User Program Mode ................................. 795
19.13.7 Block Configuration............................................................................................. 796
19.13.8 Pin Configuration................................................................................................. 797
19.13.9 Register Configuration......................................................................................... 798
19.14.1 Flash Memory Control Register 1 (FLMCR1)..................................................... 799
19.14.2 Flash Memory Control Register 2 (FLMCR2)..................................................... 802
19.14.3 Erase Block Register 1 (EBR1) ........................................................................... 803
19.14.4 Erase Block Registers 2 (EBR2).......................................................................... 803
19.14.5 System Control Register 2 (SYSCR2) ................................................................. 804
19.14.6 RAM Emulation Register (RAMER)................................................................... 805
19.15.1 Boot Mode ........................................................................................................... 807
19.15.2 User Program Mode............................................................................................. 813
19.16.1 Program Mode ..................................................................................................... 815
19.16.2 Program-Verify Mode.......................................................................................... 816
19.16.3 Erase Mode .......................................................................................................... 818
19.16.4 Erase-Verify Mode............................................................................................... 818
19.17.1 Hardware Protection ............................................................................................ 820
19.17.2 Software Protection.............................................................................................. 820
19.17.3 Error Protection.................................................................................................... 821
19.18.1 Emulation in RAM............................................................................................... 823
19.18.2 RAM Overlap ...................................................................................................... 824
19.20.1 PROM Mode Setting............................................................................................ 826
19.20.2 Socket Adapters and Memory Map...................................................................... 827
19.20.3 PROM Mode Operation....................................................................................... 829
19.20.4 Memory Read Mode ............................................................................................ 830
19.20.5 Auto-Program Mode ............................................................................................ 834
19.20.6 Auto-Erase Mode ................................................................................................. 836
19.20.7 Status Read Mode ................................................................................................ 838
19.20.8 Status Polling ....................................................................................................... 839
19.20.9 PROM Mode Transition Time ............................................................................. 840
19.20.10 Notes on Memory Programming...................................................................... 841