D12332VFC20V Renesas Electronics America, D12332VFC20V Datasheet - Page 680

IC H8S/2332 MCU ROMLESS 144QFP

D12332VFC20V

Manufacturer Part Number
D12332VFC20V
Description
IC H8S/2332 MCU ROMLESS 144QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of D12332VFC20V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12332VFC20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Serial data transmission (synchronous mode): Figure 14.16 shows a sample flowchart for serial
transmission.
The following procedure should be used for serial data transmission.
Rev.4.00 Sep. 07, 2007 Page 648 of 1210
REJ09B0245-0400
Write transmit data to TDR and
clear TDRE flag in SSR to 0
Read TDRE flag in SSR
Read TEND flag in SSR
Clear TE bit in SCR to 0
Start of transmission
All data transmitted?
Initialization
TDRE = 1?
TEND = 1?
<End>
Figure 14.16 Sample Serial Transmission Flowchart
Yes
Yes
Yes
No
No
No
[3]
[2]
[1]
[1] SCI initialization:
[2] SCI status check and transmit data
[3] Serial transmission continuation
The TxD pin is automatically
designated as the transmit data output
pin.
write:
Read SSR and check that the TDRE
flag is set to 1, then write transmit data
to TDR and clear the TDRE flag to 0.
procedure:
To continue serial transmission, be
sure to read 1 from the TDRE flag to
confirm that writing is possible, then
write data to TDR, and then clear the
TDRE flag to 0.
Checking and clearing of the TDRE
flag is automatic when the DMAC or
DTC is activated by a transmit-data-
empty interrupt (TXI) request and data
is written to TDR.

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