D12332VFC20V Renesas Electronics America, D12332VFC20V Datasheet - Page 400

• Manufacturer Part Number: D12332VFC20V
• Description: IC H8S/2332 MCU ROMLESS 144QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12332VFC20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

9.6.3
Port 5 pins also function as SCI I/O pins (TxD
(ADTRG), interrupt input pins (IRQ
BREQO). Port 5 pins P5
and D/A converter analog output pins (DA
9.10.
Table 9.10 Port 5 Pin Functions
Pin
P5
P5
P5
P5
P5
IRQ
BREQO
Rev.4.00 Sep. 07, 2007 Page 368 of 1210
REJ09B0245-0400
7
6
5
4
3
/AN
/AN
/AN
/AN
/ADTRG/
7
/WAIT/
15
14
13
12
/DA
/DA
Pin Functions
3
2
Selection Method and Pin Functions
These pins also function as A/D converter analog input pins (AN
D/A converter analog output pins (DA
direction register.
The pin function is switched as shown below according to the combination of
the operating mode, bits TRGS1 and TRGS0 in the A/D control register
(ADCR), and bits IRQPAS, WAITE, WAITPS, BREQOE, BREQOPS, and
P53DDR.
Notes: 1. ADTRG input when TRGS0 = TRGS1 = 0.
Operating
mode
[BREQOE ⋅
BREQOPS]
[WAITE ⋅
WAITPS]
P53DDR
Pin function
7
to P5
2. IRQ
4
also function as A/D converter analog input pins (AN
7
4
input when IRQPAS = 1.
input
to IRQ
P5
pin
0
3
2
0
and DA
7
output
), and bus control signal I/O pins (WAIT and
P5
2
pin
, RxD
1
3
0
3
). Port 5 pin functions are shown in table
WAIT
Modes 4 to 6
2
input
, and SCK
pin
0
IRQ
2
ADTRG input pin *
and DA
1
7
Setting
hibited
interrupt input pin *
pro-
1
2
), the A/D converter input pin
3
). P5
BREQ
output
pin
0
0
7
to P5
0
1
Setting
hibited
1
pro-
4
1
1
2
have no data
12
input
P5
pin
to AN
12
0
Mode 7
3
to AN
—
—
output
15
P5
pin
) and
1
15
3
)