D12332VFC20V Renesas Electronics America, D12332VFC20V Datasheet - Page 506

IC H8S/2332 MCU ROMLESS 144QFP

D12332VFC20V

Manufacturer Part Number
D12332VFC20V
Description
IC H8S/2332 MCU ROMLESS 144QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of D12332VFC20V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12332VFC20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bit 0—Input Capture/Output Compare Flag A (TGFA): Status flag that indicates the
occurrence of TGRA input capture or compare match.
Bit 0
TGFA
0
1
10.2.6
Note: * These counters can be used as up/down-counters only in phase counting mode or when
The TCNT registers are 16-bit counters. The TPU has six TCNT counters, one for each channel.
The TCNT counters are initialized to H'0000 by a reset and in hardware standby mode.
The TCNT counters cannot be accessed in 8-bit units; they must always be accessed as a 16-bit
unit.
Rev.4.00 Sep. 07, 2007 Page 474 of 1210
REJ09B0245-0400
Channel 0: TCNT0 (up-counter)
Channel 1: TCNT1 (up/down-counter * )
Channel 2: TCNT2 (up/down-counter * )
Channel 3: TCNT3 (up-counter)
Channel 4: TCNT4 (up/down-counter * )
Channel 5: TCNT5 (up/down-counter * )
Bit
Initial value :
R/W
counting overflow/underflow on another channel. In other cases they function as up-
counters.
Timer Counters (TCNT)
Description
[Clearing conditions]
[Setting conditions]
:
: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
When DTC is activated by TGIA interrupt while DISEL bit of MRB in DTC is 0
When DMAC is activated by TGIA interrupt while DTA bit of DMABCR in DMAC
is 1
When 0 is written to TGFA after reading TGFA = 1
When TCNT = TGRA while TGRA is functioning as output compare register
When TCNT value is transferred to TGRA by input capture signal while TGRA is
functioning as input capture register
15
0
14
0
13
0
12
0
11
0
10
0
0
9
8
0
7
0
6
0
5
0
4
0
3
0
2
0
(Initial value)
1
0
0
0

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