UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 125
UPD78F0386GK-8EU-A
Manufacturer Part Number
UPD78F0386GK-8EU-A
Description
MCU 96KB FLASH 5KB RAM
Manufacturer
Renesas Electronics America
Series
78K0/Lx2r
Datasheet
1.UPD78F0372GK-8EU-A.pdf
(624 pages)
Specifications of UPD78F0386GK-8EU-A
Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LCD, LVD, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
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(5) Main OSC control register (MOC)
This register selects the operation mode of the high-speed system clock.
This register is used to stop the X1 oscillator or to disable an external clock input from the EXCLK pin when the
CPU operates with a clock other than the high-speed system clock.
MOC can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 80H.
Address: FFA2H
Symbol
MOC
Cautions 1. When setting MSTOP to 1, be sure to confirm that the CPU operates with a clock
MSTOP
MSTOP
<7>
0
1
After reset: 80H
2. Do not clear MSTOP to 0 while bit 6 (OSCSEL) of the clock operation mode select
3. The peripheral hardware cannot operate when the peripheral hardware clock is
Figure 5-5. Format of Main OSC Control Register (MOC)
X1 oscillator operating
X1 oscillator stopped
other than the high-speed system clock. Specifically, set under either of the
following conditions.
clock)
In addition, stop peripheral hardware that is operating on the high-speed system
clock before setting MSTOP to 1.
register (OSCCTL) is 0 (I/O port mode).
stopped.
peripheral hardware clock has been stopped, initialize the peripheral hardware.
When CLS = 1 (when CPU operates with the subsystem clock)
When MCS = 0 (when CPU operates with the internal high-speed oscillation
6
0
R/W
X1 oscillation mode
CHAPTER 5 CLOCK GENERATOR
To resume the operation of the peripheral hardware after the
User’s Manual U17504EJ2V0UD
5
0
Control of high-speed system clock operation
4
0
3
0
External clock from EXCLK pin is enabled
External clock from EXCLK pin is disabled
External clock input mode
2
0
1
0
0
0
123
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