UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 150

• Manufacturer Part Number: UPD78F0386GK-8EU-A
• Description: MCU 96KB FLASH 5KB RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0/Lx2r

Specifications of UPD78F0386GK-8EU-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

5.6.8 Time required for switchover of CPU clock and main system clock
can be switched (between the main system clock and the subsystem clock) and the division ratio of the main system
clock can be changed.
pre-switchover clock for several clocks (see Table 5-7).
(CLS) of the PCC register.
the internal high-speed oscillation clock and the high-speed system clock).
pre-switchover clock for several clocks (see Table 5-8).
ascertained using bit 1 (MCS) of MCM.
148
CSS PCC2 PCC1 PCC0
Set Value Before
0
1
By setting bits 0 to 2 (PCC0 to PCC2) and bit 4 (CSS) of the processor clock control register (PCC), the CPU clock
The actual switchover operation is not performed immediately after rewriting to PCC; operation continues on the
Whether the CPU is operating on the main system clock or the subsystem clock can be ascertained using bit 5
Caution Selection of the main system clock cycle division factor (PCC0 to PCC2) and switchover from the
Remarks 1. The number of clocks listed in Table 5-7 is the number of CPU clocks before switchover.
By setting bit 0 (MCM0) of the main clock mode register (MCM), the main system clock can be switched (between
The actual switchover operation is not performed immediately after rewriting to MCM0; operation continues on the
Whether the CPU is operating on the internal high-speed oscillation clock or the high-speed system clock can be
Switchover
Table 5-7. Time Required for Switchover of CPU Clock and Main System Clock Cycle Division Factor
0
0
0
0
1
0
0
1
1
0
main system clock to the subsystem clock (changing CSS from 0 to 1) should not be set
simultaneously.
Simultaneous setting is possible, however, for selection of the main system clock cycle division
factor (PCC0 to PCC2) and switchover from the subsystem clock to the main system clock
(changing CSS from 1 to 0).
2. When switching the CPU clock from the subsystem clock to the main system clock, calculate the
0
1
0
1
0
Example When switching CPU clock from f
number of clocks by rounding up to the next clock and discarding the decimal portion, as shown
below.
CSS PCC2 PCC1 PCC0 CSS PCC2 PCC1 PCC0 CSS PCC2 PCC1 PCC0 CSS PCC2 PCC1 PCC0 CSS PCC2 PCC1 PCC0 CSS PCC2 PCC1 PCC0
0
8 clocks
4 clocks
2 clocks
2 clocks
1 clock
0
0
10 MHz)
f
XP
0
/f
SUB
0
= 10000/32.768
16 clocks
4 clocks
2 clocks
2 clocks
1 clock
0
CHAPTER 5 CLOCK GENERATOR
0
User’s Manual U17504EJ2V0UD
1
0
16 clocks
8 clocks
2 clocks
2 clocks
Set Value After Switchover
1 clock
305.1
0
1
SUB
/2 to f
0
306 clocks
0
XP
16 clocks
/2 (@ oscillation with f
8 clocks
4 clocks
2 clocks
1 clock
0
1
1
0
16 clocks
8 clocks
4 clocks
2 clocks
2 clocks
1
0
SUB
= 32.768 kHz, f
0
1
2f
f
f
f
f
XP
XP
XP
XP
XP
/2f
/4f
/8f
/f
/f
SUB
SUB
SUB
SUB
SUB
clocks
clocks
clocks
clocks
clocks
XP
=