UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 346

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UPD78F0386GK-8EU-A

Manufacturer Part Number
UPD78F0386GK-8EU-A
Description
MCU 96KB FLASH 5KB RAM
Manufacturer
Renesas Electronics America
Series
78K0/Lx2r
Datasheet

Specifications of UPD78F0386GK-8EU-A

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LCD, LVD, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
(3) Timing of output to SO10 pin (first bit)
344
When communication is started, the value of transmit buffer register 10 (SOTB10) is output from the SO10 pin.
The output operation of the first bit at this time is described below.
The first bit is directly latched by the SOTB10 register to the output latch at the falling (or rising) edge of SCK10,
and output from the SO10 pin via an output selector. Then, the value of the SOTB10 register is transferred to the
SIO10 register at the next rising (or falling) edge of SCK10, and shifted one bit. At the same time, the first bit of
the receive data is stored in the SIO10 register via the SI10 pin.
The second and subsequent bits are latched by the SIO10 register to the output latch at the next falling (or rising)
edge of SCK10, and the data is output from the SO10 pin.
Writing to SOTB10 or
Writing to SOTB10 or
reading from SIO10
reading from SIO10
Output latch
Output latch
SOTB10
SOTB10
SCK10
SCK10
SIO10
SIO10
SO10
SO10
Figure 15-7. Output Operation of First Bit (1/2)
CHAPTER 15 SERIAL INTERFACE CSI10
(b) Type 3: CKP10 = 1, DAP10 = 0
(a) Type 1: CKP10 = 0, DAP10 = 0
User’s Manual U17504EJ2V0UD
First bit
First bit
2nd bit
2nd bit

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