UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 484

• Manufacturer Part Number: UPD78F0386GK-8EU-A
• Description: MCU 96KB FLASH 5KB RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0/Lx2r

Specifications of UPD78F0386GK-8EU-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

(4) External interrupt rising edge enable register (EGP), external interrupt falling edge enable register (EGN)
Address: FF48H
Symbol
EGP
Address: FF49H
Symbol
EGN
482
These registers specify the valid edge for INTP0 to INTP5.
EGP and EGN are set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets these registers to 00H.
Table 19-3 shows the ports corresponding to EGPn and EGNn.
Caution Select the port mode by clearing EGPn and EGNn to 0 because an edge may be
Remark n = 0 to 5
EGPn
Detection Enable Register
7
0
7
0
0
0
1
1
After reset: 00H
After reset: 00H
Figure 19-5. Format of External Interrupt Rising Edge Enable Register (EGP)
EGP0
EGP1
EGP2
EGP3
EGP4
EGP5
detected when the external interrupt function is switched to the port function.
EGNn
6
0
6
0
0
1
0
1
Table 19-3. Ports Corresponding to EGPn and EGNn
and External Interrupt Falling Edge Enable Register (EGN)
EGN0
EGN1
EGN2
EGN3
EGN4
EGN5
R/W
R/W
Edge detection disabled
Falling edge
Rising edge
Both rising and falling edges
EGN5
CHAPTER 19 INTERRUPT FUNCTIONS
EGP5
5
5
P120
P30
P31
P32
P33
P16
User’s Manual U17504EJ2V0UD
Edge Detection Port
EGN4
EGP4
INTPn pin valid edge selection (n = 0 to 7)
4
4
EGN3
EGP3
3
3
INTP0
INTP1
INTP2
INTP3
INTP4
INTP5
EGN2
EGP2
2
2
Interrupt Request Signal
EGN1
EGP1
1
1
EGP0
EGN0
0
0