UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 132
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UPD78F0386GK-8EU-A
Manufacturer Part Number
UPD78F0386GK-8EU-A
Description
MCU 96KB FLASH 5KB RAM
Manufacturer
Renesas Electronics America
Series
78K0/Lx2r
Datasheet
1.UPD78F0372GK-8EU-A.pdf
(624 pages)
Specifications of UPD78F0386GK-8EU-A
Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LCD, LVD, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
- Current page: 132 of 624
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5.4.3 When subsystem clock is not used
subsystem clock as an I/O port, set the XT1 and XT2 pins to I/O mode (OSCSELS = 0) and connect them as follows.
5.4.4 Internal high-speed oscillator
oscillation mode register (RCM).
5.4.5 Internal low-speed oscillator
internal low-speed oscillation clock cannot be used as the CPU clock.
by software” is set, oscillation can be controlled by the internal oscillation mode register (RCM).
driven (240 kHz (TYP.)) if the watchdog timer operation is enabled using the option byte.
5.4.6 Prescaler
as the clock to be supplied to the CPU.
130
If it is not necessary to use the subsystem clock for low power consumption operations, or if not using the
Input (PM123/PM124 = 1):
Output (PM123/PM124 = 0): Leave open.
Remark OSCSELS:
The internal high-speed oscillator is incorporated in the 78K0/LF2. Oscillation can be controlled by the internal
After a reset release, the internal high-speed oscillator automatically starts oscillation (8 MHz (TYP.)).
The internal low-speed oscillator is incorporated in the 78K0/LF2.
The internal low-speed oscillation clock is only used as the watchdog timer and the clock of 8-bit timer H1. The
“Can be stopped by software” or “Cannot be stopped” can be selected by the option byte. When “Can be stopped
After a reset release, the internal low-speed oscillator automatically starts oscillation, and the watchdog timer is
The prescaler generates various clocks by dividing the main system clock when the main system clock is selected
PM123, PM124: Bits 3 and 4 of port mode register 12 (PM12)
Bit 4 of clock operation mode select register (OSCCTL)
Independently connect to V
CHAPTER 5 CLOCK GENERATOR
User’s Manual U17504EJ2V0UD
DD
or V
SS
via a resistor.
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