UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 469

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UPD78F0386GK-8EU-A

Manufacturer Part Number
UPD78F0386GK-8EU-A
Description
MCU 96KB FLASH 5KB RAM
Manufacturer
Renesas Electronics America
Series
78K0/Lx2r
Datasheet

Specifications of UPD78F0386GK-8EU-A

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LCD, LVD, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
18.3 Register Controlling Multiplier/Divider
CHAPTER 18 MULTIPLIER/DIVIDER ( PD78F0374, 78F0375, 78F0376, 78F0376D, 78F0384, 78F0385, 78F0386, AND 78F0386D ONLY)
Address: FF68H
The multiplier/divider is controlled by multiplier/divider control register 0 (DMUC0).
DMUC0
Symbol
(1) Multiplier/divider control register 0 (DMUC0)
Note When DMUE is set to 1, the operation is started. DMUE is automatically cleared to 0 after the operation is
Cautions 1. If DMUE is cleared to 0 during operation processing (when DMUE is 1), the operation result
DMUC0 is an 8-bit register that controls the operation of the multiplier/divider.
DMUC0 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets DMUC0 to 00H.
complete.
2. Do not change the value of DMUSEL0 during operation processing (while DMUE is 1). If it is
3. If DMUE is cleared to 0 during operation processing (while DMUE is 1), the operation
DMUSEL0
DMUE
DMUE
After reset: 00H
<7>
is not guaranteed. If the operation is completed while the clearing instruction is being
executed, the operation result is guaranteed, provided that the interrupt flag is set.
changed, undefined operation results are stored in multiplication/division data register A0
(MDA0) and remainder data register 0 (SDR0).
processing is stopped. To execute the operation again, set multiplication/division data
register A0 (MDA0), multiplication/division data register B0 (MDB0), and multiplier/divider
control register 0 (DMUC0), and start the operation (by setting DMUE to 1).
0
1
0
1
Figure 18-5. Format of Multiplier/Divider Control Register 0 (DMUC0)
Note
Stops operation
Starts operation
Division mode
Multiplication mode
6
0
R/W
5
0
User’s Manual U17504EJ2V0UD
Operation mode (multiplication/division) selection
4
0
Operation start/stop
3
0
2
0
1
0
DMUSEL0
0
467

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