UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 622
UPD78F0386GK-8EU-A
Manufacturer Part Number
UPD78F0386GK-8EU-A
Description
MCU 96KB FLASH 5KB RAM
Manufacturer
Renesas Electronics America
Series
78K0/Lx2r
Datasheet
1.UPD78F0372GK-8EU-A.pdf
(624 pages)
Specifications of UPD78F0386GK-8EU-A
Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LCD, LVD, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
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C.1 Major Revisions in This Edition
620
Throughout
CHAPTER 1 OUTLINE
p. 18
p. 19
p. 23
p. 25
p. 26
p. 28
CHAPTER 3 CPU ARCHITECTURE
p. 44
p. 47
p. 49
p. 50
p. 51
p. 52
p. 53
p. 56
p. 58
p. 68
p. 81
p. 82
p. 83
CHAPTER 11 CLOCK OUTPUT CONTROLLER
p. 250
CHAPTER 15 SERIAL INTERFACE CSI10
p. 335
Remark “Classification” in the above table classifies revisions as follows.
Page
(a): Error correction, (b): Addition/change of specifications, (c): Addition/change of description or note,
(d): Addition/change of package, part number, or management division, (e): Addition/change of related
documents
Addition of following products
Delection of following products
Addition of P60 and P61 pins, port mode register 6 (PM6), and port register 6 (P6)
Extending value range of capacitor (“0.47 F: target”
Addition of Memory bank select register
Deletion of description concerning production process division management from 1.1 Features
Change of 1.3 Ordering Information
Change of 1.5 78K0/Lx2 Series Lineup
Change of 1.6 Block Diagram
Change of 1.7 Outline of Functions ( PD78F037x)
Change of 1.8 Outline of Functions ( PD78F038x)
Change of and addition of Note 1 to Table 3-1 Set Values of Internal Memory Size Switching
Register (IMS) and Internal Expansion RAM Size Switching Register (IXS)
Addition of Figures 3-3 Memory Map ( PD78F0374, 78F0384)
Addition of Figures 3-5 Memory Map ( PD78F0376, 78F0386)
Addition of Figures 3-6 Memory Map ( PD78F0376D, 78F0386D)
Change of Table 3-2 Internal ROM Capacity
Change of Table 3-4 Internal High-Speed RAM Capacity
Change of Table 3-5 Internal Expansion RAM Capacity
Addition of Figure 3-9 Correspondence Between Data Memory and Addressing
( PD78F0374, 78F0384)
Addition of Figure 3-11 Correspondence Between Data Memory and Addressing
( PD78F0376, 78F0376D, 78F0386, 78F0386D)
Addition of Note 3 to Table 3-7 Special Function Register List (4/4)
Addition of 3.5 Memory Bank ( PD78F0376, 78F0376D, 78F0386, AND 78F0386D ONLY)
Addition of 3.6 Memory Bank Select Register (BANK) ( PD78F0376, 78F0376D, 78F0386,
AND 78F0386D ONLY)
Addition of 3.7 Selecting Memory Bank ( PD78F0376, 78F0376D, 78F0386, AND 78F0386D
ONLY)
Change of Figure 11-2 Format of Clock Output Selection Register (CKS)
Change of Figure 15-3 Format of Serial Clock Selection Register 10 (CSIC10)
PD78F0374, 78F0376, 78F0376D, 78F0384, 78F0386, 78F0386D
PD78F0375D, 78F0385D
APPENDIX C REVISION HISTORY
User’s Manual U17504EJ2V0UD
Description
“0.47 to 1 F: recommended)
Classification
(c, d)
(d)
(b)
(b)
(b)
(d)
(d)
(d)
(d)
(d)
(d)
(d)
(d)
(d)
(d)
(d)
(d)
(d)
(d)
(c)
(b)
(b)
(b)
(b)
(b)
(1/2)
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