UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 388

• Manufacturer Part Number: UPD78F0386GK-8EU-A
• Description: MCU 96KB FLASH 5KB RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0/Lx2r

Specifications of UPD78F0386GK-8EU-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

386
(2) Master operation (multi-master system)
Note Confirm that the bus is released (CLD0 bit = 1, DAD0 bit = 1) for a specific period (for example, for a period
1
No
of one frame). If the SDA0 pin is constantly at low level, decide whether to release the I
SDA0 pins = high level) in conformance with the specifications of the product that is communicating.
ACKE0 = WTIM0 = SPIE0 = 1
Setting STCEN and IICRSV
Checking bus status
Enables reserving
interrupt occurs?
Master operation
communication.
IICCL0
SVA0
IICC0
IICX0
IICF0
IICRSV = 0?
Setting port
SPD0 = 1?
SPIE0 = 1
IICE0 = 1
INTIIC0
START
starts?
A
Figure 16-24. Master Operation Flowchart (Multi-Master System) (1/3)
Yes
Yes
Yes
Yes
(Communication start request)
0XH
XXH
0XH
XXH
XXH
Bus status is
being checked.
Waiting to be specified as a slave by other master
Waiting for a communication start request (depends on user program)
Note
Disables reserving
communication.
(No communication start request)
No
No
No
Sets each pin in the I
Selects a transfer clock.
Sets a local address.
Sets a start condition.
Releases the bus for a specific period.
Slave operation
B
CHAPTER 16 SERIAL INTERFACE IIC0
User’s Manual U17504EJ2V0UD
STCEN = 1?
2
C mode (see 16.3 (7) Port mode register 6 (PM6)).
interrupt occurs?
Yes
Slave operation
SPIE0 = 0
INTIIC0
Yes
No
Waits for a communication request.
No
interrupt occurs?
SPD0 = 1?
SPT0 = 1
INTIIC0
Yes
Yes
No
No
Waits for detection
of the stop condition.
Prepares for starting
communication
(generates a stop condition).
Slave operation
2
C bus (SCL0 and