UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 74
UPD78F0386GK-8EU-A
Manufacturer Part Number
UPD78F0386GK-8EU-A
Description
MCU 96KB FLASH 5KB RAM
Manufacturer
Renesas Electronics America
Series
78K0/Lx2r
Datasheet
1.UPD78F0372GK-8EU-A.pdf
(624 pages)
Specifications of UPD78F0386GK-8EU-A
Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LCD, LVD, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
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3.4 Operand Address Addressing
during instruction execution.
3.4.1 Implied addressing
72
The following methods are available to specify the register and memory (addressing) to undergo manipulation
[Function]
[Operand format]
[Description example]
The register that functions as an accumulator (A and AX) among the general-purpose registers is automatically
(implicitly) addressed.
Of the 78K0/LF2 instruction words, the following instructions employ implied addressing.
Because implied addressing can be automatically employed with an instruction, no particular operand format is
necessary.
In the case of MULU X
With an 8-bit
the A and AX registers are specified by implied addressing.
MULU
DIVUW
ADJBA/ADJBS
ROR4/ROL4
Instruction
8-bit multiply instruction, the product of A register and X register is stored in AX. In this example,
AX register for dividend and quotient storage
A register for multiplicand and AX register for product storage
A register for storage of numeric values that become decimal correction targets
A register for storage of digit data that undergoes digit rotation
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U17504EJ2V0UD
Register to Be Specified by Implied Addressing
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