UPD78F0386GK-8EU-A Renesas Electronics America, UPD78F0386GK-8EU-A Datasheet - Page 424

• Manufacturer Part Number: UPD78F0386GK-8EU-A
• Description: MCU 96KB FLASH 5KB RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0/Lx2r

Specifications of UPD78F0386GK-8EU-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

422
LCDSEG
LCDCTL
Address
LCDCTL : A7, A6, A5, A4, A3, A2, A1, A0
LCDSEG: A7, A6, A5, A4, A3, A2, A1, A0
Access
D7
D7
Cautions 1. Generate a stop condition if an access like the one shown below is made.
(2) Communication format
target
Note
Remark
D6
D6
Write data to each register on the LCD controller/driver starting from the start condition, slave ID, address,
write data, then stop condition in that order.
continuously performing read/write access from transmissions of the start condition to stop condition. With
this function, the address does not need to be set each time.
With the 78K0/LF2, the address is incremented by one based on the register read/write start address by
D5
D5
2. When SDA0 is fixed at the low level output status due to noise, input 0 to P130 (bit 0 of port
ST:
SP:
A7 to A0: Addresses for LCDCTL or LCDSEG
<1>
ST
ST
ST
Figure 16-31. Communication Format for Write Operation (When Writing Twice)
Write data 1
register 13) to reset the LCD controller/driver.
• An access made in a format other than specified
• An access made with a slave ID other than specified
D4
D4
<7>
0
0
D3
D3
Start condition
Stop condition
1
1
1
1
Slave ID
D2
D2
<2>
1
1
D1
D1
0
0
CHAPTER 16 SERIAL INTERFACE IIC0
0
0
D0
D0
0
1
User’s Manual U17504EJ2V0UD
ACK
ACK
ACK
<8>
R/W
<3>
0
0
Address
LCDCTL : (A7, A6, A5, A4, A3, A2, A1, A0) + 1
LCDSEG: (A7, A6, A5, A4, A3, A2, A1, A0) + 1
D7
D7
ACK
ACK
ACK
<4>
D6
D6
Note
A7
A7
D5
D5
Write data 2
A6
A6
D4
D4
<9>
A5
A5
D3
D3
Address
A4
A4
D2
D2
<5>
A3
A3
D1
D1
A2
A2
D0
D0
A1
A1
<10>
ACK
ACK
ACK
A0
A0
ACK
ACK
ACK
<6>
<11>
SP
SP
SP