M30262F8GP#U7 Renesas Electronics America, M30262F8GP#U7 Datasheet - Page 138

IC M16C/TINY MCU FLASH 48LQFP

M30262F8GP#U7

Manufacturer Part Number
M30262F8GP#U7
Description
IC M16C/TINY MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheets

Specifications of M30262F8GP#U7

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
38
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Clock Asynchronous Serial I/O (UART) Mode
130
Table 1.15.9 Registers used in UART mode and the register values set
Note 1: The bits used for transmit/receive data are as follows: Bit 0 to bit 6 when transfer data is 7 bits long;
Note 2: Set the U0C1 and U1C1 registers bit 4 to bit 5 to “0”. The U0IRS, U1IRS, U0RRM and U1RRM bits
Note 3: TxD2 pin is N channel open-drain output. Set the U2C0 register's NCH bit to “0”.
i=0 to 2
Register
UiTB
UiRB
UiBRG
UiMR
UiC0
UiC1
UiSMR
UiSMR2
UiSMR3
UiSMR4
UCON
bit 0 to bit 7 when transfer data is 8 bits long; bit 0 to bit 8 when transfer data is 9 bits long.
are included in the UCON register.
Preliminary Specifications Rev. 0.9
0 to 8
0 to 8
OER,FER,PER,SUM Error flag
---
SMD2 to SMD0
CKDIR
STPS
PRY, PRYE
IOPOL
CLK0, CLK1
CRS
TXEPT
CRD
NCH
CKPOL
UFORM
TE
TI
RE
RI
U2IRS (Note 2)
U2RRM (Note 2)
UiLCH
UiERE
0 to 7
0 to 7
0 to 7
0 to 7
U0IRS, U1IRS
U0RRM, U1RRM
CLKMD0
CLKMD1
RCSP
7
Specifications in this manual are tentative and subject to change.
Bit
Set transmission data (Note 1)
Reception data can be read (Note 1)
Set a transfer rate
Set these bits to ‘100
Set these bits to ‘101
Set these bits to ‘110
Select the internal clock or external clock
Select the stop bit
Select whether parity is included and whether odd or even
Select the TxD/RxD input/output polarity
Select the count source for the UiBRG register
Select CTS or RTS to use
Transmit register empty flag
Enable or disable the CTS or RTS function
Select TxDi pin output mode (Note 2)
Set to “0”
LSB first or MSB first can be selected when transfer data is 8 bits long. Set this
bit to “0” when transfer data is 7 or 9 bits long.
Set this bit to “1” to enable transmission
Transmit buffer empty flag
Set this bit to “1” to enable reception
Reception complete flag
Select the source of UART2 transmit interrupt
Set to “0”
Set this bit to “1” to use inverted data logic
Set to “0”
Set to “0”
Set to “0”
Set to “0”
Set to “0”
Select the source of UART0/UART1 transmit interrupt
Set to “0”
Invalid because CLKMD1 = 0
Set to “0”
Set this bit to “1” to accept as input the UART0 CTS
Set to “0”
Renesas Technology Corp.
2
2
2
Function
’ when transfer data is 7 bits long
’ when transfer data is 8 bits long
’ when transfer data is 9 bits long
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
0
signal from the P6
M16C/26 Group
4
pin

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