M30262F8GP#U7 Renesas Electronics America, M30262F8GP#U7 Datasheet - Page 203

• Manufacturer Part Number: M30262F8GP#U7
• Description: IC M16C/TINY MCU FLASH 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/26r

Specifications of M30262F8GP#U7

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

CPU Rewrite Mode (Flash Memory Version)
Precautions on CPU Rewrite Mode
Described below are the precautions to be observed when rewriting the flash memory in CPU rewrite mode.
(1) Operation speed
(2) Instructions inhibited against use
(3) Interrupts inhibited against use
(4) How to access
(5) Writing in the user ROM area
(6) STOP/WAIT
During CPU rewrite mode (EW0/EW1 mpde), set the BCLK as shown below using the main clock
divide ratio select bit (bit 6 at address 0006
10.0 MHz or less when wait bit (bit 7 at address 0005
Note : Always perform it with a condition mentioned above.
The instructions listed below cannot be used during EW0 mode because they refer to the internal data
of the flash memory:
UND instruction, INTO instruction, JMPS instruction, JSRS instruction, and BRK instruction
The address match interrupt cannot be used during EW0 mode because they refer to the internal data
of the flash memory. If interrupts have their vector in the variable vector table, they can be used by
transferring the vector into the RAM area. The NMI and watchdog timer interrupts can be used to
automatically initialize the flash identification register and flash memory control register 0 to “0”, then
return to normal operation. However, these two interrupts' jump addresses are located in the fixed
vector table and there must exsist a routine to be executed. Since the rewrite operation is halted when
an NMI or watchdog timer interrupts occurs, you must reset the CPU rewite mode select bit to “1” and
the perform the erase/program operation again.
For EW0 mode select bit and lock bit disable select bit to be set to “1”, the user needs to write a “0” and
then a “1” to it in succession. When it is not this procedure, it is not enacted in “1”. This is necessary
to ensure that no interrupt or DMA transfer will be executed during the interval. Also only when NMI
pin is “H” level.
If power is lost while rewriting blocks that contain the flash rewrite program with the CPU rewrite
mode, those blocks may not be correctly rewritten and it is possible that the flash memory can no
longer be rewritten after that. Therefore, it is recommended to use the standard serial I/O mode or
parallel I/O mode to rewrite these blocks.
Both instructions disrupt erase/program operation, and the state of the blocks operated upon is not
guaranteed. Inhibit these instructions when in CPU rewrite mode.
Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change.
Renesas Technology Corp.
16
and bits 6 and 7 at address 0007
16
) = 1 (with internal access wait state)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
16
):
M16C/26 Group
195