M30262F8GP#U7 Renesas Electronics America, M30262F8GP#U7 Datasheet - Page 204

IC M16C/TINY MCU FLASH 48LQFP

M30262F8GP#U7

Manufacturer Part Number
M30262F8GP#U7
Description
IC M16C/TINY MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheets

Specifications of M30262F8GP#U7

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
38
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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196
CPU Rewrite Mode (Flash Memory Version)
Table 1.20.1. List of software commands (CPU rewrite mode)
Software Commands
Table 1.20.1 lists the software commands available with the M16C/26 (flash memory version).
After setting the CPU rewrite mode select bit to 1, write a software command to specify an erase or
program operation. Note that when entering a software command, the upper byte (D
The content of each software command is explained below.
The first bus cycle commands must be written to an even address in the user ROM area.
Note 1: When a software command is input, the high-order byte of data (D
Note 2: SRD = Status Register Data (Set an address to even address in the user ROM area)
Note 3: WA = Write Address (even address), WD = Write Data (16-bit data)
Note 4: BA = Block Address (Enter the maximum address of each block that is an even address.)
Note 5: X denotes a given address in the user ROM area (that is an even address).
Read array
Read status register
Clear status register
Read Array Command (FF
Read Status Register Command (70
Clear Status Register Command (50
Block erase
Program
The read array mode is entered by writing the command code “FF
even address to be read is input in one of the bus cycles that follow, the content of the specified
address is read out at the data bus (D
The read array mode is retained intact until another command is written.
However, please begin to read data in the following procedures when a user uses read array com-
mand after program command.
(1) Set FF
(2) Input the top address which FF
(3) Input the top address till FFFF
(4) Input top address +2
(5) Input top address +2 till FFFF
(6) Input an arbitrary address
When the command code “70
read out at the data bus (D
in the user ROM area).
The status register is explained in the next section.
In EW1 mode, cannot use read status register command.
This command is used to clear the bits SR4 and SR5 of the status register after they have been set.
These bits indicate that operation has ended in an error. To use this command, write the command
code “50
Command
Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change.
16
16
” in the first bus cycle.
, FF
(Note 3)
16
, FF
16
Write
Write
Write
Write
Write
Mode
, FF
16
0
–D
)
16
16
7
to arbitrary continuing four address beforehand
First bus cycle
) by a read in the second bus cycle (Set an address to even address
” is written in the first bus cycle, the content of the status register is
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16
16
Address
16
agrees with the value that begins to have been read
WA
agrees with the value that begins to have been read
16
16
X
X
X
X
was set at (in read array mode)
0
)
)
–D
15
), 16 bits at a time.
(D
0
Data
FF
70
50
40
20
to D
16
16
16
16
16
7
)
Mode
Read
Write
Write
8
to D
S
15
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
) is ignored.
econd bus cycle
WA
BA
Address
16
” in the first bus cycle. When an
X
(Note 3)
(Note 4)
SRD
D0
WD
(D
Data
0
16
8
to D
(Note 2)
(Note 3)
to D
M16C/26 Group
7
)
15
) is ignored.

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