M30262F8GP#U7 Renesas Electronics America, M30262F8GP#U7 Datasheet - Page 42

IC M16C/TINY MCU FLASH 48LQFP

M30262F8GP#U7

Manufacturer Part Number
M30262F8GP#U7
Description
IC M16C/TINY MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheets

Specifications of M30262F8GP#U7

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
38
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Oscillation Stop Detection
34
Oscillation Stop Detection Function
Figure 1.8.5. Oscillation stop detection circuit
Table 1.8.2. Specification overview of the oscillation stop detection function
The oscillation stop detection function detects abnormal stopping of the clock by causes such as opening
and shorting of the X
oscillation stop detection interrupt is generated. The selection depends on the value in the bit 7 of the
oscillation stop detection register (address 000C
ated, the ring oscillator in the microcomputer operates automatically and is used as the system clock in
place of the X
The oscillation stop detection function can be enabled/disabled with bit 0 of the oscillation stop detection
register. When this bit is set to “1,” the function is enabled. After the reset is released, the oscillation stop
detection function becomes disabled because the bit value is “0.”
Table 1.8.2 gives an specification overview of the oscillation stop detection function, Figure 1.8.5 is a
configuration diagram of the oscillation stop detection circuit and Figure 1.8.6 shows the configuration of
the oscillation stop detection register.
Oscillation stop detectable clock
and frequency bandwidth
Enabling condition for oscillation
stop detection function
Operation at oscillation stop,
re-oscillation detection
Notes on STOP mode
X
IN
Preliminary Specifications Rev. 0.9
#:When X
Specifications in this manual are tentative and subject to change.
Item
When X
it regards the oscillation as stopped.
IN
clock. This allows interrupt processing.
Pulse generation
circuit for clock
edge detection
and charge/
discharge control
IN
IN
IN
is supplied, this repeats charge and discharge with pulses by X
is not supplied, this continues charging. When the charge exceeds a certain level,
oscillation circuit. When oscillation stop is detected, either an internal reset or an
Ring oscillator
Charge/
discharge
circuit
When the oscillation stop detection bit (bit 0 of address 000C
is set to “1”
• Internal reset occurs (when bit CM27 = "0")
• Oscillation stop, re-oscillation detection interrupt occurs (when bit
Before setting up the stop mode, write “0” in the oscillation stop
detection enable bit to disable the oscillation stop detection function.
Write "1" in the bit again after the stop mode is.
f(X
Renesas Technology Corp.
IN
)
³
2 MHz
CM27 = “1”)
16
CM07
). When an oscillation stop detection interrupt is gener-
CM21, CM20
0
1
11
01
Oscillation stop
detection interrupt
generating circuit
Internal reset
generating circuit
Specification
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Watchdog
timer
interrupt
Main clock switch control
Main clock To the main clock
IN
edge detection.
division circuit
Internal reset
M16C/26 Group
To the CPU
16
)

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