M30262F8GP#U7 Renesas Electronics America, M30262F8GP#U7 Datasheet - Page 55

• Manufacturer Part Number: M30262F8GP#U7
• Description: IC M16C/TINY MCU FLASH 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/26r

Specifications of M30262F8GP#U7

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Interrupts
Interrupts and Interrupt Vector Tables
Figure 1.9.2. Format for specifying interrupt vector addresses
Table 1.9.1. Interrupts assigned to the fixed vector tables and addresses of vector tables
Note: Interrupts used for debugging purposes only.
Undefined instruction
Overflow
BRK instruction
Address match
Single step (Note)
Watchdog timer,
Oscillation stop and
re-oscillation detection,
V
DBC (Note)
NMI
Reset
Interrupt source
If an interrupt request is accepted, a program branches to the interrupt routine set in the interrupt vector
table. The first address of the interrupt routine is stored in the corresponding vector. Figure 1.9.2 shows
the format for specifying the address.
Two types of interrupt vector tables are available — fixed vector table in which addresses are fixed and
variable vector table in which addresses can be varied by the setting.
DET4
• Fixed vector table
The fixed vector table is a table in which addresses are fixed. The vector tables are located in an
address range extending from FFFDC
address of interrupt routine in the corresponding vector. Table 1.9.1 shows the interrupts assigned to
the fixed vector table and the vector addresses.
detection
Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change.
Vector address + 0
Vector address + 1
Vector address + 2
Vector address + 3
Vector table addresses
Address (L) to address (H)
FFFDC
FFFE0
FFFE4
FFFE8
FFFEC
FFFF0
FFFF4
FFFF8
FFFFC
16
16
16
16
16
16
16
16
16
to FFFF3
to FFFF7
to FFFFB
to FFFE3
to FFFE7
to FFFEB
to FFFFF
to FFFEF
to FFFDF
Renesas Technology Corp.
MSB
16
16
16
16
16
16
16
16
16
16
to FFFFF
Interrupt on UND instruction
Interrupt on INTO instruction
If the vector contains FF
the address shown by the vector in the variable vector table.
There is an address-matching interrupt enable bit.
Do not use.
Do not use.
External interrupt by input to NMI pin.
16
. A vector consists of four bytes. Set the first
Remarks
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
16
, program execution starts from
LSB
M16C/26 Group
47