M30262F8GP#U7 Renesas Electronics America, M30262F8GP#U7 Datasheet - Page 210

• Manufacturer Part Number: M30262F8GP#U7
• Description: IC M16C/TINY MCU FLASH 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/26r

Specifications of M30262F8GP#U7

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

202
Functions to Inhibit Rewriting Flash Memory Version
Functions To Inhibit Rewriting Flash Memory Version
Figure 1.21.1. ROM code protect control address
To prevent the contents of the flash memory version from being read out or rewritten easily, the device
incorporates a ROM code protect function for use in parallel I/O mode and an ID code check function for
use in standard serial I/O mode.
ROM code protect function
ROM code protect control address
The ROM code protect function is used to prohibit reading out or modifying the contents of the flash
memory during parallel I/O mode and is set by using the ROM code protect control address register
(0FFFFF
exists in the user ROM area.)
If either bit of ROMCP1 is set to '0', ROM code protect level 1 is turned on, so that the contents of the flash
memory are protected against readout and modification.
If either bit of ROMCP2 is set to '0', ROM code protect level 2 is turned on, enabling additional protection
against readout and modification (such as by a production LSI tester). If both level 1 and level 2 are
enabled, level 2 is selected by default.
If both of the two ROM code protect reset bits are set to “00,” ROM code protect is turned off, so that the
contents of the flash memory version can be read out or modified. Once ROM code protect is turned on,
the contents of the ROM code protect reset bits cannot be modified in parallel I/O mode. Use the serial I/
O or some other mode to rewrite the contents of the ROM code protect reset bits.
b7
b6
Note 1: When ROM code protect is turned on, the on-chip flash memory is protected against
Note 2: When ROM code protect level 2 is turned on, ROM code readout by a shipment inspection
Note 3: The ROM code protect reset bits can be used to turn off ROM code protect level 1 and
b5
Preliminary Specifications Rev. 0.9
16
b4
Specifications in this manual are tentative and subject to change.
). Figure 1.21.1 shows the ROM code protect control address (0FFFFF
readout or modification in parallel input/output mode.
LSI tester, etc. also is inhibited. Customers desiring to use ROM code protect level 2 should
first contact their Renesas technical support representative.
ROM code protect level 2. However, since these bits cannot be changed in parallel input/
output mode, they need to be rewritten in serial input/output or some other mode
b3
b2
b1
1
b0
1
Bit symbol
ROMCP1
ROMCP2
Reserved bit
ROMCR
Symbol
ROMCP
Renesas Technology Corp.
ROM code protect level 2
set bit (Note 1, 2)
ROM code protect level
1 set bit (Note 1)
ROM code protect reset
bit (Note 3)
0FFFFF
Address
Bit name
16
When reset
b5 b4
00: Protect removed
01: Protect set bit effective
10: Protect set bit effective
11: Protect set bit effective
b3 b2
00: Protect enabled
01: Protect enabled
10: Protect enabled
11: Protect disabled
b7 b6
00: Protect enabled
01: Protect enabled
10: Protect enabled
11: Protect disabled
FF
Always set this bit to 1.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
16
Function
16
M16C/26 Group
). (This address
.