M30262F8GP#U7 Renesas Electronics America, M30262F8GP#U7 Datasheet - Page 225

IC M16C/TINY MCU FLASH 48LQFP

M30262F8GP#U7

Manufacturer Part Number
M30262F8GP#U7
Description
IC M16C/TINY MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheets

Specifications of M30262F8GP#U7

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
38
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Appendix Standard Serial I/O Mode 1 (Flash Memory Version)
Table 1.22.4. Status register 1 (SRD1)
Status Register 1 (SRD1)
SRD1 bits
SR15 (bit7)
SR14 (bit6)
SR13 (bit5)
SR12 (bit4)
SR11 (bit3)
SR10 (bit2)
SR9 (bit1)
SR8 (bit0)
Status register 1 indicates the status of serial communications, results from ID checks and results from
check sum comparisons. It can be read after the SRD by writing the read status register command (70
Also, status register 1 is cleared by writing the clear status register command (50
Table 1.22.4 gives the definition of each status register 1 bit. “00
and the flag status is maintained even after the reset.
Boot Update Completed Bit (SR15)
Flash Identification Value (SR14)
Check Sum Match Bit (SR12)
ID Check Completed Bits (SR11 and SR10)
Data Receive Time Out (SR9)
This flag indicates whether the control program was downloaded to the RAM or not, using the down-
load function.
This flag indicates whether the flash memor type is HND or DINOR.
This flag indicates whether the check sum matches or not when a program, is downloaded for execu-
tion using the download function.
These flags indicate the result of ID checks. Some commands cannot be accepted without an ID check.
This flag indicates when a time out error is generated during data reception. If this flag is attached during
data reception, the received data is discarded and the microcomputer returns to the command wait state.
Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change.
Boot update completed bit
Flash identification value
ID check completed bits
Data receive time out
Check sum match bit
Status name
Reserved
Reserved
Renesas Technology Corp.
d
Update co
Time out
Match
HND
"1"
00
01
10
11
-
-
mpleted
16
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Definition
” is output when power is turned ON
Not verified
Verification mismatch
Reserved
Verified
Normal operation
Not update
Mismatch
DINOR
"0"
-
-
16
).
M16C/26 Group
16
).
217

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