M30262F8GP#U7 Renesas Electronics America, M30262F8GP#U7 Datasheet - Page 201

• Manufacturer Part Number: M30262F8GP#U7
• Description: IC M16C/TINY MCU FLASH 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/26r

Specifications of M30262F8GP#U7

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

CPU Rewrite Mode (Flash Memory Version)
Figure 1.20.2a. EW0 mode set/reset flowchart
Figure 1.20.2b. EW1 mode set/reset flowchart
Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change.
EW0 mode operation procedure
Note 1: In EW0 mode, must not be set to boot mode.
Note 2: During CPU rewrite mode, set the BCLK as shown below using the main clock divide ratio select bit (bit 6
Note 3: For CPU rewrite mode select bit to be set to 1 , the user needs to write a 0 and then a 1 to it in
Note 4: Before exiting the CPU rewrite mode after completing erase or program operation, always be sure to
Note 5: 1 can be set. However, when this bit is 1 , user ROM area is accessed.
(Subsequent operations are executed by control
Jump to transferred control program in RAM
Note 1: In EW0 mode, must not be set to boot mode.
Note 2: During CPU rewrite mode, set the BCLK as shown below using the main clock divide ratio select bit (bit 6
Note 3: For CPU rewrite mode select bit to be set to 1 , the user needs to write a 0 and then a 1 to it in
Note 4: Before exiting the CPU rewrite mode after completing erase or program operation, always be sure to
Note 5: 1 can be set. However, when this bit is 1 , user ROM area is accessed.
Single-chip mode, memory expansion
at address 0006
Set processor mode register (Note 2)
6.25 MHz or less when wait bit (bit 7 at address 0005
10.0 MHz or less when wait bit (bit 7 at address 0005
succession. When it is not this procedure, it is not enacted in 1 . This is necessary to ensure that no
interrupt or DMA transfer will be executed during the interval. Write to this bit only when executing out of
an area other than the internal flash memory. Also only when NMI pin is H level.
execute a read array command or reset the flash memory.
Transfer CPU rewrite mode control
mode, or boot mode (Note 1)
at address 0006
6.25 MHz or less when wait bit (bit 7 at address 0005
10.0 MHz or less when wait bit (bit 7 at address 0005
succession. When it is not this procedure, it is not enacted in 1 . This is necessary to ensure that no
interrupt or DMA transfer will be executed during the interval. Write to this bit only when executing out of
an area other than the internal flash memory. Also only when NMI pin is H level.
execute a read array command or reset the flash memory.
program to internal RAM
program in this RAM)
Program in ROM
Start
16
*1
EW1 mode operation procedure
and bits 6 and 7 at address 0007
Using software command execute erase,
program, or other operation
(Set lock bit disable bit as required)
(by writing 0 and then 1 in succession)(Note 3)
Single-chip mode or memory expansion mode
16
Renesas Technology Corp.
and bits 6 and 7 at address 0007
having set EW0 mode select bit to 1
Set processor mode register (Note 2)
Set EW1 mode select bit to 1 after
Write 0 to EW0 mode select bit
Program in ROM
(Note 1)
End
Start
16
16
16
):
Execute read array command or reset flash
memory by setting flash memory reset bit (by
writing 1 and then 0 in succession) (Note 4)
) = 0 (without internal access wait state)
) = 1 (with internal access wait state)
Set CPU rewrite mode select bit to 1 (by
writing 0 and then 1 in succession)(Note 3)
(Boot mode only)
Write 0 to user ROM area select bit (Note 5)
16
Using software command execute erase,
program, or other operation
(Set lock bit disable bit as required)
Write 0 to CPU rewrite mode select bit
16
16
):
(Boot mode only)
Set user ROM area select bit to 1
) = 0 (without internal access wait state)
) = 1 (with internal access wait state)
Program in RAM
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
End
*1
M16C/26 Group
193