R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 219

IC SUPERH MPU ROMLESS 449-BGA

R8A77800ANBGAV

Manufacturer Part Number
R8A77800ANBGAV
Description
IC SUPERH MPU ROMLESS 449-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77800ANBGAV

Core Processor
SH-4A
Core Size
32-Bit
Speed
400MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
75
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
449-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R8A77800ANBGAV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
7.3
7.3.1
The UTLB is used for the following two purposes:
1. To translate a virtual address to a physical address in a data access
2. As a table of address translation information to be recorded in the ITLB in the event of an
The UTLB is so called because of its use for the above two purposes. Information in the address
translation table located in external memory is cached into the UTLB. The address translation
table contains virtual page numbers and address space identifiers, and corresponding physical page
numbers and page management information. Figure 7.6 shows the UTLB configuration. The
UTLB consists of 64 fully-associative type entries. Figure 7.7 shows the relationship between the
page size and address format.
[Legend]
• VPN: Virtual page number
• ASID: Address space identifier
ITLB miss
For 1-Kbyte page: Upper 22 bits of virtual address
For 4-Kbyte page: Upper 20 bits of virtual address
For 64-Kbyte page: Upper 16 bits of virtual address
For 1-Mbyte page: Upper 12 bits of virtual address
Indicates the process that can access a virtual page.
In single virtual memory mode and user mode, or in multiple virtual memory mode, if the SH
bit is 0, this identifier is compared with the ASID in PTEH when address comparison is
performed.
TLB Functions
Unified TLB (UTLB) Configuration
Entry 0
Entry 1
Entry 2
Entry 63
ASID [7:0]
ASID [7:0]
ASID [7:0]
ASID [7:0] VPN [31:10] V
Figure 7.6 UTLB Configuration
VPN [31:10]
VPN [31:10]
VPN [31:10]
V
V
V
PPN [28:10]
PPN [28:10]
PPN [28:10]
PPN [28:10] SZ [1:0] SH C PR [1:0]
SZ [1:0]
SZ [1:0]
SZ [1:0]
Section 7 Memory Management Unit (MMU)
Rev.1.00 Dec. 13, 2005 Page 167 of 1286
SH
SH
SH
C
C
C
PR [1:0]
PR [1:0]
PR [1:0]
D
D
D
D WT
WT
WT
WT
REJ09B0158-0100

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