R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 673

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

15.4.2
PLLCR is a 32-bit readable/writable register that controls the clock output on the CLKOUT pin.
This register can only be accessed in longwords.
Initial value:
Initial value:
Bit
31 to 16
15 to 13
12 to 2
1
0
R/W:
R/W:
BIt:
BIt:
PLL Control Register (PLLCR)
Bit Name



CKOFF

31
15


R
R
0
1
30
14


R
R
0
1
29
13


R
R
0
1
Initial
Value
All 0
All 1
All 0
0
1
28
12


R
R
0
0
R/W
R
R
R
R/W
R
27
11


R
R
0
0
26
10


R
R
0
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Reserved
This bit is always read as 1. The write value should
always be 1.
Writing 0 to any of these bits, the operation of this LSI
is not guaranteed.
Reserved
These bits are always read as 0. The write value
should always be 0.
CLKOUT Output Stop
Stops the clock output on the CLKOUT pin.
0: Clock is output on the CLKOUT pin
1: Clock is not output on the CLKOUT pin
Reserved
This bit is always read as 1. The write value should
always be 1.
25


R
R
0
9
0
24


R
R
0
8
0
23


R
R
0
7
0
Rev.1.00 Dec. 13, 2005 Page 621 of 1286
Section 15 Clock Pulse Generator (CPG)
22


R
R
0
6
0
21


R
R
0
5
0
20


R
R
0
4
0
19


R
R
0
3
0
REJ09B0158-0100
18


R
R
0
2
0
CKOFF
R/W
17

R
0
1
0
16


R
R
0
0
1