R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 620

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 14 Direct Memory Access Controller (DMAC)
14.3.2
SARB are 32-bit readable/writable registers that specify the source address of a DMA transfer that
is set in SAR again in repeat/reload mode. Data to be written from the CPU to SAR is also written
to SARB. To set SARB address that differs from SAR address, write data to SARB after SAR.
To transfer data in word or in longword units, specify the address with word or longword address
boundary. When transferring data in 16-byte or in 32-byte units, a 16-byte or 32-byte boundary
must be set for the source address value. The initial value is undefined.
14.3.3
DAR are 32-bit readable/writable registers that specify the destination address of a DMA transfer.
During a DMA transfer, these registers indicate the next destination address.
To transfer data in word or in longword units, specify the address with word or longword address
boundary. When transferring data in 16-byte or in 32-byte units, a 16-byte or 32-byte boundary
must be set for the destination address value. The initial value is undefined.
Rev.1.00 Dec. 13, 2005 Page 568 of 1286
REJ09B0158-0100
Initial value:
Initial value:
Initial value:
Initial value:
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
DMA Source Address Registers B0 to B3, B6 to B9
(SARB0 to SARB3, SARB6 to SARB9)
DMA Destination Address Registers 0 to 11 (DAR0 to DAR11)
R/W
R/W
R/W
R/W
31
—
15
—
31
—
15
—
R/W
R/W
R/W
R/W
30
14
—
—
30
—
14
—
R/W
R/W
R/W
R/W
29
—
13
—
29
—
13
—
R/W
R/W
R/W
R/W
28
—
12
—
28
—
12
—
R/W
R/W
R/W
R/W
27
—
11
—
27
—
11
—
R/W
R/W
R/W
R/W
26
—
10
—
26
—
10
—
R/W
R/W
R/W
R/W
25
—
—
25
—
—
9
9
R/W
R/W
R/W
R/W
24
—
—
24
—
—
8
8
SARB
SARB
DAR
DAR
R/W
R/W
R/W
R/W
23
—
—
23
—
—
7
7
R/W
R/W
R/W
R/W
22
—
—
22
—
—
6
6
R/W
R/W
R/W
R/W
21
—
—
21
—
—
5
5
R/W
R/W
R/W
R/W
20
—
—
20
—
—
4
4
R/W
R/W
R/W
R/W
19
—
—
19
—
—
3
3
R/W
R/W
R/W
R/W
18
—
—
18
—
—
2
2
R/W
R/W
R/W
R/W
17
—
—
17
—
—
1
1
R/W
R/W
R/W
R/W
16
—
—
16
—
—
0
0