R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 764
R8A77800ANBGAV
Manufacturer Part Number
R8A77800ANBGAV
Description
IC SUPERH MPU ROMLESS 449-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77800ANBGV.pdf
(1342 pages)
Specifications of R8A77800ANBGAV
Core Processor
SH-4A
Core Size
32-Bit
Speed
400MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
75
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
449-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77800ANBGAV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 20 Realtime Clock (RTC)
20.3.1
R64CNT is an 8-bit read-only register that indicates a state of 64 Hz to 1 Hz within the RTC
frequency divider.
If this register is read when a carry is generated from the 128 Hz frequency division stage, bit 7
(CF) in RTC control register 1 (RCR1) is set to 1, indicating the simultaneous occurrence of the
carry and the 64 Hz counter read. In this case, the read value is not valid, and so R64CNT must be
read again after first writing 0 to the CF bit in RCR1 to clear it.
When the RESET bit or ADJ bit in RTC control register 2 (RCR2) is set to 1, the RTC frequency
divider is initialized and R64CNT is initialized to H'00.
R64CNT is not initialized by a power-on or manual reset.
Bit 7 is always read as 0 and cannot be modified.
20.3.2
RSECCNT is an 8-bit readable/writable register used as a counter for setting and counting the
BCD-coded second value in the RTC. It counts on the carry (transition of the R64CNT.1Hz bit
from 1 to 0) generated once per second by the 64 Hz counter.
The setting range is decimal 00 to 59. The RTC will not operate normally if any other value is set.
Write processing should be performed after stopping the count with the START bit in RCR2, or
by using the carry flag.
RSECCNT is not initialized by a power-on or manual reset.
Bit 7 is always read as 0. A write to this bit is invalid, but the write value should always be 0.
Rev.1.00 Dec. 13, 2005 Page 712 of 1286
REJ09B0158-0100
64 Hz Counter (R64CNT)
Second Counter (RSECCNT)
Initial value:
Initial value:
R/W:
R/W:
BIt:
BIt:
—
—
R
R
7
0
7
0
1 Hz
R/W
—
—
10-second units
R
6
6
2 Hz
R/W
—
—
R
5
5
4 Hz
R/W
—
—
R
4
4
8 Hz
R/W
—
—
R
3
3
1-second units
16 Hz
R/W
—
—
R
2
2
32 Hz
R/W
—
—
R
1
1
64 Hz
R/W
—
—
R
0
0
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