PIC18F87J72-I/PT Microchip Technology, PIC18F87J72-I/PT Datasheet - Page 265

• Manufacturer Part Number: PIC18F87J72-I/PT
• Description: IC PIC MCU 8BIT 14KB FLSH 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F87J72-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 80-TQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: SPI, USART, SPI, I2C
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 14
• Controller Family/series: PIC18F
• No. Of I/o's: 51
• Ram Memory Size: 3923Byte
• Cpu Speed: 48MHz
• No. Of Timers: 4
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

FIGURE 20-2:
FIGURE 20-3:
TABLE 20-4:
 2010 Microchip Technology Inc.
INTCON
PIR3
PIE3
IPR3
RCSTA2
TXREG2
TXSTA2
SPBRG2
LATG
Legend: — = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous transmission.
Note: This timing diagram shows two consecutive transmissions.
(Interrupt Reg. Flag)
Reg. Empty Flag)
Reg. Empty Flag)
Write to TXREG2
(Transmit Buffer
Name
Reg. Empty Flag)
Write to TXREG2
(Transmit Shift
(Transmit Shift
BRG Output
(Shift Clock)
BRG Output
(Shift Clock)
TX2 (pin)
TX2IF bit
TRMT bit
TX2 (pin)
TRMT bit
TX2IF bit
AUSART Transmit Register
AUSART Baud Rate Generator Register
GIE/GIEH PEIE/GIEL TMR0IE
CSRC
SPEN
U2OD
Bit 7
REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
—
—
—
1 T
ASYNCHRONOUS TRANSMISSION
ASYNCHRONOUS TRANSMISSION (BACK TO BACK)
CY
Word 1
Transmit Shift Reg
Transmit Shift Reg.
Word 1
Word 1
Word 1
LCDIE
LCDIP
LCDIF
U1OD
Bit 6
RX9
TX9
1 T
CY
Start bit
Start bit
Word 2
RC2IE
RC2IP
RC2IF
SREN
TXEN
Bit 5
—
1 T
CY
bit 0
bit 0
Preliminary
INT0IE
LATG4
CREN
TX2IF
TX2IE
TX2IP
SYNC
Bit 4
bit 1
Word 1
bit 1
PIC18F87J72 FAMILY
Word 1
CTMUIF
CTMUIE
CTMUIP
ADDEN
LATG3
RBIE
Bit 3
—
TMR0IF
CCP2IF
CCP2IE
CCP2IP
LATG2
BRGH
FERR
Bit 2
bit 7/8
bit 7/8
Word 2
Transmit Shift Reg.
CCP1IE
CCP1IP
CCP1IF
INT0IF
LATG1
Stop bit
OERR
TRMT
Bit 1
Stop bit
Start bit
RTCCIF
RTCCIE
RTCCIP
LATG0
RX9D
TX9D
DS39979A-page 265
RBIF
Bit 0
Word 2
on Page
Values
bit 0
Reset
49
52
52
52
54
54
54
54
52