PIC18F87J72-I/PT Microchip Technology, PIC18F87J72-I/PT Datasheet - Page 456

• Manufacturer Part Number: PIC18F87J72-I/PT
• Description: IC PIC MCU 8BIT 14KB FLSH 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F87J72-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 80-TQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: SPI, USART, SPI, I2C
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 14
• Controller Family/series: PIC18F
• No. Of I/o's: 51
• Ram Memory Size: 3923Byte
• Cpu Speed: 48MHz
• No. Of Timers: 4
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F87J72 FAMILY
B.6
The addresses associated with the internal registers
are listed below. A detailed description of the registers
follows. All registers are 8 bits long and can be
addressed separately. Read modes define the groups
and
communication or looping on address sets.
TABLE B-13:
TABLE B-14:
DS39979A-page 456
Address
0x0A
0x0B
0x00
0x03
0x06
0x07
0x08
0x09
types
STATUS/COM
DATA_CH0
DATA_CH1
Internal Registers
CONFIG1
CONFIG2
Function
PHASE
GAIN
of
STATUS/COM
DATA_CH0
DATA_CH1
REGISTER MAP GROUPING FOR CONTINUOUS READ MODES
CONFIG1
CONFIG2
REGISTER MAP
registers
reserved
PHASE
Name
GAIN
for
continuous
Address
Bits
24
24
8
8
8
8
8
8
0x0A
0x0B
0x00
0x01
0x02
0x03
0x04
0x05
0x07
0x08
0x09
R/W
R/W Phase Delay Configuration Register
R/W Gain Configuration Register
R/W Status/Communication Register
R/W Configuration Register 1
R/W Configuration Register 2
—
R
R
read
Channel 0 ADC Data<23:0>, MSB First
Channel 1 ADC Data<23:0>, MSB First
Reserved; Ignore Reads, Do Not Write
Preliminary
GROUP
GROUP
GROUP
GROUP
“01”
.
Description
READ<1:0>
TYPE
TYPE
“10”
 2010 Microchip Technology Inc.
Register Map
Loop Entire
“11”