WG82574IT S LBAC Intel, WG82574IT S LBAC Datasheet - Page 214

• Manufacturer Part Number: WG82574IT S LBAC
• Description: CONTROLLER, ENET, INTEL 82574IT, 64PQFN
• Manufacturer: Intel

Specifications of WG82574IT S LBAC

• Ethernet Type: IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: QFN
• No. Of Pins: 64
• Package / Case: QFN
• Interface Type: I2C, JTAG, PCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 50.
8.4.5.3
Figure 51.
214
1
S
MC Slave Address
Target Address
Asynchronous Notify Command Format
The target address and data byte low/high is taken from the Receive Enable command
or NVM configuration.
Direct Receive Method
If configured, the 82574L has the capability to send a message it needs to transfer to
the external MC as a master over the SMBus instead of alerting the MC and waiting for
it to read the message.
The message format follows. Note that the command that is used is the same
command that is used by the external MC in the Block Read command. The opcode that
the 82574L puts in the data is also the same as it put in the Block Read command of
the same functionality. The rules for the F and L flags (bits) are also the same as in the
Block Read command.
Direct Receive Transaction Format
7
Byte Count
Data Byte Low
Interface
8
N
8
Wr
1
0
1
A
0
1
A
0
1
A
0
Data Byte 1
Data Byte High
First
Flag
8
Alert Value
1
F
8
Last
Flag
1
L
1
A
0
1
A
0
Receive TCO Command
. . .
1
P
Command
01 0000b
1
A
0
6
82574 GbE Controller—System Manageability
Data Byte N
8
1
A
0
. . .
1
A
0
1
P