WG82574IT S LBAC Intel, WG82574IT S LBAC Datasheet - Page 363
WG82574IT S LBAC
Manufacturer Part Number
WG82574IT S LBAC
Description
CONTROLLER, ENET, INTEL 82574IT, 64PQFN
Manufacturer
Intel
Datasheet
1.WG82574IT_S_LBAC.pdf
(490 pages)
Specifications of WG82574IT S LBAC
Ethernet Type
IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
QFN
No. Of Pins
64
Package / Case
QFN
Interface Type
I2C, JTAG, PCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Driver Programing Interface—82574 GbE Controller
10.2.7.43
10.2.7.44
Note:
10.2.7.45
Total Octets Transmitted - TOT (0x040C8; RW)
These registers make up a logical 64-bit register that counts the total number of octets
transmitted.
This register resets whenever the upper 32 bits are read (TOTH). In addition, it sticks
at 0xFFFF_FFFF_FFFF_FFFF when the maximum value is reached.
All transmitted packets have their octets summed into this register, regardless of their
length or whether they are flow control packets. This register includes bytes
transmitted in a packet from the <Destination Address> field through the <CRC> field,
inclusively.
Octets transmitted as part of partial packet transmissions (for example, collisions in
half-duplex mode) are not included in this register. This register only increments if
transmits are enabled.
Total Packets Received - TPR (0x040D0; RW)
This register counts the total number of all packets received. All packets received are
counted in this register, regardless of their length, whether they are erred, or whether
they are flow control packets. This register only increments if receives are enabled.
Broadcast rejected packets are counted in this counter (in contradiction to all other
rejected packets that are not counted).
Total Packets Transmitted - TPT (0x040D4; RW)
This register counts the total number of all packets transmitted. All packets transmitted
will be counted in this register, regardless of their length, or whether they are flow
control packets.
Partial packet transmissions (for example, collisions in half-duplex mode) are not
included in this register. This register only increments if transmits are enabled. This
register counts all packets, including standard packets, secure packets, packets
received over the SMBus and packets generated by the ASF function.
TOTL
TOTH
TPR
TPT
Field
Field
Field
31:0
31:0
31:0
31:0
This register must be accessed using two independent 32-bit accesses.
Bit(s)
Bit(s)
Bit(s)
0x0
0x0
0x0
0x0
Initial
Initial
Initial
Value
Value
Value
Number of total octets transmitted – lower 4 bytes.
Number of total octets transmitted – upper 4 bytes.
Number of all packets received.
Number of all packets transmitted.
Description
Description
Description
363
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