WG82574IT S LBAC Intel, WG82574IT S LBAC Datasheet - Page 370

• Manufacturer Part Number: WG82574IT S LBAC
• Description: CONTROLLER, ENET, INTEL 82574IT, 64PQFN
• Manufacturer: Intel

Specifications of WG82574IT S LBAC

• Ethernet Type: IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: QFN
• No. Of Pins: 64
• Package / Case: QFN
• Interface Type: I2C, JTAG, PCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.2.8.7
10.2.8.8
370
1. The 82574L does not support SMBus ARP.
1. The initial value is loaded from the IP Address Valid bit of the NVM’s Management Control register
IPv4 Address Table - IP4AT (0x05840–0x05858; RW)
The IPv4 Address Table register is used to store the four IPv4 addresses for ARP
request packet and directed IPv4 packet wake up. The first entry is also used to store
the IP address used for routing RMCP and optionally ARP packets to an internal ASF
function. It has the following format:
Management Control Register - MANC (0x05820; RW)
This register is written by the MC and should not be written by the host.
V43
Reserved
V60
Reserved
Reserved
TCO_RESET
RCV_TCO_EN
KEEP_PHY_
LINK_UP
0
2
3
4
IPV4ADDR0
IPV4ADDR1
IPV4ADDR2
IPV4ADDR3
DWord#
Field
Field
Field
3
15:4
16
31:17
15:0
16
17
18
0x5840
0x5848
0x5850
0x5858
0
2
4
6
Dword #
Bit(s)
Bit(s)
Address
0b
0x0
0b
0x0
0x0
0b
0b
0b
0x5840
0x5848
0x5850
0x5858
Initial
Initial
Value
Value
Address
IPV4ADDR0
IPV4ADDR1
IPV4ADDR2
IPV4ADDR3
IPv4 Address 3 Valid
Reserved
IPv6 Address 0 Valid
Reserved
Reserved
TCO Reset Occurred
Set to 1b on a TCO reset.
This bit is only reset by Internal Power On Reset.
Receive TCO Packets Enabled
When this bit is set, it enables the receive flow from the wire to the
manageability block.
Block PHY reset and power state changes.
When this bit is set, the PHY is not reset on PE_RST_N or in-band
PCIe reset and it does not change its power state. This bit cannot be
written unless No_PHY_Rst EEPROM bit is set.
This bit is reset by Internal Power On Reset.
31
31:0
31:0
31:0
31:0
Bit(s)
82574 GbE Controller—Driver Programing Interface
X
X
X
X
Initial Value
1
Description
Description
IPv4 Address 0 (least significant byte is
first on the wire).
IPv4 Address 1
IPv4 Address 2
IPv4 Address 3
Description
1
0
/IPv4