WG82574IT S LBAC Intel, WG82574IT S LBAC Datasheet - Page 342

• Manufacturer Part Number: WG82574IT S LBAC
• Description: CONTROLLER, ENET, INTEL 82574IT, 64PQFN
• Manufacturer: Intel

Specifications of WG82574IT S LBAC

• Ethernet Type: IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: QFN
• No. Of Pins: 64
• Package / Case: QFN
• Interface Type: I2C, JTAG, PCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Note:
Note:
10.2.5.25
10.2.5.26
342
There is one register per 32 bits of the VLAN Filter table. The size of the word array
depends on the number of bits implemented in the VLAN filter table. Software must
mask to the desired bit on reads and supply a 32-bit word on writes.
All accesses to this table must be 32-bit.
The algorithm for VLAN filtering via the VFTA is identical to that used for the multicast
table array.
These registers' addresses have been moved from where they were located in previous
devices. However, for backwards compatibility, these registers can also be accessed at
their alias offsets of 0x00600-0x006FC
Multiple Receive Queues Command Register - MRQC (0x05818; RW)
Redirection Table - RETA (0x05C00-0x05C7F; RW)
The redirection table is a 128-entry table, each entry is 8-bits wide. Only 6 bits of each
entry are used (5 bits for the CPU index and 1 bit for queue index). The table is
configured through the following read/write registers.
. . .
Multiple
Receive
Queues
Enable
Reserved
RSS Field
Enable
Tag 3
Tag 127
31
Field
1:0
15:2
31:16
Bit(s)
….24
00b
0x0
0x0
Tag 2
…
Initial
23
Value
Multiple Receive Queues Enable
Enables support for multiple receive queues and defines the
mechanism that controls queue allocation. Note that the
RXCSUM.PCSD bit must also be set to enable multiple receive queues.
00b = Multiple Receive Queues are disabled
01b = Multiple Receive Queues as defined by MSFT RSS. The RSS
Field Enable bits define the header fields used by the hash function.
10b = Reserved.
11b = Reserved.
Note that this field can be modified only when receive to host is not
enabled (RCTL.EN = 0b).
Reserved
Each bit, when set, enables a specific field selection to be used by the
hash function. Several bits can be set at the same time.
Bit[16] – Enable TcpIPv4 hash function
Bit[17] – Enable IPv4 hash function
Bit[18] – Enable TcpIPv6 hash function
Bit[19] – Enable IPv6Ex hash function
Bit[20] – Enable IPv6 hash function
Bits[31:21] – Reserved
16
82574 GbE Controller—Driver Programing Interface
Tag 1
…
15
Description
8
Tag 0
…
7
0