WG82574IT S LBAC Intel, WG82574IT S LBAC Datasheet - Page 316
WG82574IT S LBAC
Manufacturer Part Number
WG82574IT S LBAC
Description
CONTROLLER, ENET, INTEL 82574IT, 64PQFN
Manufacturer
Intel
Datasheet
1.WG82574IT_S_LBAC.pdf
(490 pages)
Specifications of WG82574IT S LBAC
Ethernet Type
IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
QFN
No. Of Pins
64
Package / Case
QFN
Interface Type
I2C, JTAG, PCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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10.2.3.10
10.2.3.11
10.2.3.12
10.2.3.13
316
3GIO Statistic Counter Registers #3- GSCN_3 (0x05B2C; RW)
Software Semaphore Register - SWSM (0x05B50; RW)
3GPIO Control Register 2 - GCR2 (0x05B64; RW)
MSI—X PBA Clear - PBACLR (0x5B68; RW1C)
SWESMBI
Reserved
Reserved
Reserved
Reserved
Reserved
PENBIT
Reserved
SMBI
Field
Field
Field
0
1
2
3
31:4
31:1
0
4:0
31:5
Bit(s)
Bit(s)
Bit(s)
1b
0b
0b
0b
0x0
0x0
0b
0x0
0x0
Initial
Initial
Initial
Value
Value
Value
This bit is set by hardware when this register is read by the software
device driver and cleared when the host driver writes 0b to it.
The first time this register is read, the value is 0b. In the next read,
the value is 1b (hardware mechanism). The value remains 1b until the
software device driver clears it.
Note: This bit is typically used by multiple software threads when a
device has multiple LAN functions. Since the 82574 is a single port
device it is typically not needed. However, if there are multiple
software threads of execution accessing the 82574 it could be used as
part of a software thread semaphore mechanism.
Software EEPROM Semaphore Bit
This bit should be set only by the software device driver (read only to
firmware).
Note: This bit should not be used in the 82574. Instead, the
EXTCNF_CTRL.MDIO/NVW SW Ownership bit should be used when the
software device driver needs to access the PHY or NVM (see
Section
Hardware clears this bit on GIO soft reset.
Reserved
Reserved
Reserved
Reserved
Reserved. Must be set to 1b by software during initialization.
MSI-X Pending bit Clear
Writing a 1b to any bit clears the corresponding MSIXPBA bit; writing
0b has no effect.
Reserved
4.6.2).
82574 GbE Controller—Driver Programing Interface
Description
Description
Description
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