WG82574IT S LBAC Intel, WG82574IT S LBAC Datasheet - Page 447

• Manufacturer Part Number: WG82574IT S LBAC
• Description: CONTROLLER, ENET, INTEL 82574IT, 64PQFN
• Manufacturer: Intel

Specifications of WG82574IT S LBAC

• Ethernet Type: IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: QFN
• No. Of Pins: 64
• Package / Case: QFN
• Interface Type: I2C, JTAG, PCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Design Considerations—82574 GbE Controller
Figure 74.
13.5.5.2
Minimizing the amount of space needed for the Ethernet LAN interface is important
because other interfaces compete for physical space on a motherboard near the
connector. The Ethernet LAN circuits need to be as close as possible to the connector.
General Placement Distances for 1000 BASE-T Designs
Figure 74
differential pairs, but can be generalized for a Gigabit system with four analog pairs.
The ideal placement for the Ethernet silicon would be approximately one inch behind
the magnetics module.
While it is generally a good idea to minimize lengths and distances,
illustrates the need to keep the LAN silicon away from the edge of the board and the
magnetics module for best EMI performance.
Layout Guidelines for Use with Integrated and Discrete Magnetics
Layout requirements are slightly different when using discrete magnetics.
These include:
Figure 75
• Ground cut for HV installation (not required for integrated magnetics)
• A maximum of two (2) vias
• Turns less than 45
• Discrete terminators
Note:
differential pairs not shown for gigabit implementations.
Figure 74
shows some basic placement distance guidelines.
shows a reference layout for discrete magnetics.
Keep silicon traces at least 1" from edge of
PB (2" is preferred).
Silicon
LAN
represents a 10/100 diagram. Use the same design considerations for the two
°
Keep LAN silicon 1" - 4" from LAN connector.
Keep minimum distance between differential pairs
more than seven times the dielectric thickness away
traces and parallel digital traces.
from each other and other traces, including NVM
Figure 74
Integrated
Magnetics
Figure 74
w/LAN
shows two
RJ-45
also
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