KC82870DH S L5X2 Intel, KC82870DH S L5X2 Datasheet - Page 10

• Manufacturer Part Number: KC82870DH S L5X2
• Manufacturer: Intel

Specifications of KC82870DH S L5X2

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Overview
1.4
1.5
1-4
Revision History
Reference Documents
DDR SDRAM
DIMM
MCP
DMH
Main Channel
Branch Channel
CFM
CTM
RQ
DQA/DQB
MSIO Bus
BSIO Bus
MT/s
Revision
•
•
•
•
Number
-001
Jedec Standard JESD-21C
Jedec Standard 79 (JESD79)
I
Intel
2
C Bus Specifications, Version 2.0
®
E8870 Scalable Node Controller (SNC) Datasheet
Initial release of this document.
Double Data Rate Synchronous Dynamic Random Access
Memory as defined by the Jedec DDR SDRAM
specification.
Dual Inline Memory Module.
Memory Control Packets.
DDR Memory Hub.
The RAC signals used to communicate with SNC.
Clock From Master - Main Channel Receive clock.
Main Channel Data Signals (RSL signal level).
The Main Channel Serial I/O bus. Uses the RAC serial I/O
CMOS signals.
The Branch Channel Serial I/O bus. This is the DIMM Serial
Presence Detect interface.
A DDR DIMM bus.
Clock To Master - Main Channel Transmit clock.
Main Channel Request Control Signals (RSL signal level).
Mega-Transfers per second.
Description
Intel
®
E8870DH DDR Memory Hub (DMH) Datasheet
August 2002
Date