KC82870DH S L5X2 Intel, KC82870DH S L5X2 Datasheet - Page 23
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KC82870DH S L5X2
Manufacturer Part Number
KC82870DH S L5X2
Description
Manufacturer
Intel
Datasheet
1.KC82870DH_S_L5X2.pdf
(78 pages)
Specifications of KC82870DH S L5X2
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
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3.11
Intel
®
E8870DH DDR Memory Hub (DMH) Datasheet
PWR – Power Up Control Register
This register provides manual access to internal functions that are automatically controlled.
Address:
Default:
Access:
Size:
15:14
13
12
11
10
9
8
7
6
5
4
3
2
Bit
Reserved
RAC Reset (RRESET):
0 = RAC is alive.
1 = RAC held in reset.
RAC Power Good (RPWRGD):
0 = RAC held in reset.
1 = RAC is alive.
Core Power Good (CPWRGD):
0 = 200 MHz core held in reset.
1 = 200 MHz core is alive.
DIMM Clock Enable (CKE):
0 = Deasserted.
1 = Asserted.
RAC Clock Lock (RCL):
0 = Not Locked.
1 = Locked.
RAC BIST Failure (RBF):
0 = Passed.
1 = Failed.
RAC BIST Mode (RBM):
1 = Enabled.
0 = Disabled.
Reserved
RAC Current Skip Value (RCSV):
0 = Falling edge of internal RAC clock.
1 = Rising edge of internal RAC clock.
RAC Latch Skip Mode (RLSM):
0 = Skip Mode Enabled.
1 = Skip Mode Disabled.
RAC Skip Mode (RSM):
0 = Normal mode.
1 = Use RFSV.
RAC Forced Skip Value (RFSV):
0 = Falling edge of internal RAC clock.
1 = Rising edge of internal RAC clock.
R/W: RVXSEL, RFSV, RSM, RLSM, RBM, RPWRGD, CPWRGD, CKE, RRESET
10h
0100h
R-O: RCSV, RBF, RCL
16 bits
Description
Registers
3-9
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