KC82870DH S L5X2 Intel, KC82870DH S L5X2 Datasheet - Page 42

• Manufacturer Part Number: KC82870DH S L5X2
• Manufacturer: Intel

Specifications of KC82870DH S L5X2

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Functional Description
4.11.4.2
4.11.4.3
Figure 4-11. Random Byte Read Timing
4.11.4.4
4-14
Table 4-4. SCK Clock Divider Frequency Table
Clock Divider
The SPD register contains a clock divider field (DIV).
frequency settings, assuming SCK = 1 MHz.
BSIO Request Packet for SPD Random Read
The MSIO transaction packet format for the SPD EEPROM Random Read command is shown in
Figure
of the MSIO SA packet selects the I
this purpose.
Upon receiving the MSIO SPDR command, the DMH generates the Random Read Register I
command sequence on the BSIO interface. The returned data is then stored in the DMH SPD
register in bits [7:0], and the RDO field is set to 1 by the DMH to indicate that the data is present
and that the command has completed without error (see
Detect Status
BSIO Request Packet for SPD Byte Write
The MSIO transaction packet format for the SPD EEPROM Byte Write command is shown in
Figure
field of the MSIO SA packet selects the I
field of the MSIO SD packet.
S
DIV
10
12
13
14
15
11
0
1
2
3
4
5
6
7
8
9
S
P
D
3
4-11. C[2:0] of the MSIO SRQ packet provides the I
4-12. C[2:0] of the MSIO SRQ packet provides the I
S
P
D
2
Slave Address
S
P
D
1
S
P
D
0
Register”).
C
2
SCL Frequency
C
1
38.5 KHz
23.9 KHz
17.2 KHz
13.5 KHz
11.1 KHz
100 KHz
9.4 KHz
8.2 KHz
7.3 KHz
6.5 KHz
5.9 KHz
5.4 KHz
4.6 KHz
4.3 KHz
5 KHz
4 KHz
C
0
W
R
/
A
C
K
S
A
7
S
A
6
Byte Address
S
A
5
S
A
4
Frequency Scaler
2
C Byte Address. Note that the MSIO SD packet is unused for
S
A
3
S
A
2
2
C Byte Address. The Write Data is passed in the SD[7:0]
S
A
1
106
122
138
154
170
186
202
218
234
250
10
26
42
58
74
90
S
A
0
Intel
A
C
K
S
®
S
P
D
3
E8870DH DDR Memory Hub (DMH) Datasheet
S
P
D
2
Slave Address
Table 4-4
Section 3.10, “SPD – Serial Presence
S
P
D
1
S
P
D
0
2
2
C Slave Address, while SA[7:0] field
C
2
C Slave Address, while the SA[7:0]
C
1
provides the available SCL
C
0
W
R
/
A
C
K
DATA
N
A
C
K
001190
2
C
P