KC82870DH S L5X2 Intel, KC82870DH S L5X2 Datasheet - Page 44

• Manufacturer Part Number: KC82870DH S L5X2
• Manufacturer: Intel

Specifications of KC82870DH S L5X2

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Functional Description
4.13
4.13.1
4-16
Table 4-5. DDR SDRAM Command Encoding for SDI Register
Figure 4-13. PWRGOOD Sequence Method 1
a. This NOP is used when the selected DIMM Chip Select CS[2:0] is not asserted at the time of this command.
b. This NOP is used when the selected DIMM Chip Select CS[2:0] is asserted at the time of this command.
NOTES:
Power Good Sequence
The assertion of PWRGOOD indicates that all voltage supplies are stable and within their
operating specifications. During deassertion of the PWRGOOD signal, the DMH will
asynchronously set all I/O pins to the state indicated in
reset all internal logic and all registers.
Upon the assertion of PWRGOOD, the DMH requires two serial clocks (SCK) to complete its reset
sequence. After this period of time has elapsed, and after the DMH is receiving a clean and stable
Main Channel clock (CFM/CTM), software may proceed to bring the high-speed core out of reset
and initialize it by following the procedures outlined in
When bringing the DMH out of PWRGOOD reset, the CMD and SIO signals must be quiescent,
and SCK must be provided by one of two appropriate methods.
The first method
scenario, the quality of SCK while PWRGOOD is deasserted is not important. Once PWRGOOD
is asserted, SCK must be stable.
Reset
1. X = Don’t care, H = Logic high, L = Logic low.
2. PA = Precharge All (CA
3. Opcode = Extended Mode Register Operation on A
4. BA = Bank Address (BA
(Extended) Mode Register Set
Precharge Single Bank
NOP for Self-refresh
Precharge all Banks
Auto Refresh
Function
NOP
NOP
a
b
(Figure
V
SCK
PWRGOOD
CC
10
0
-BA
4-13) is used when SCK begins before PWRGOOD assertion. In this
).
1
).
CKE
n-1
H
H
H
H
H
H
L
CKE
H
n
H
H
H
H
H
L
CS#
H
X
Intel
L
L
L
L
L
0
-A
®
RAS# CAS#
14
T0
E8870DH DDR Memory Hub (DMH) Datasheet
X
H
L
X
L
L
L
,BA
Table
Section 4.14, “Initialization.”
0
-BA
T1
X
H
H
H
X
L
L
1
.
2-1,
WE#
Commands
Table 2-2,
Ready f or
H
H
X
X
L
L
L
Serial
PA = L, BA = Bank Address
and
Table 2-3,
Address
Opcode
PA = H
X
X
X
X
and
001192