MCF5282CVM66 Freescale, MCF5282CVM66 Datasheet - Page 113
MCF5282CVM66
Manufacturer Part Number
MCF5282CVM66
Description
Manufacturer
Freescale
Datasheet
1.MCF5282CVM66.pdf
(766 pages)
Specifications of MCF5282CVM66
Cpu Family
MCF528x
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Interface Type
CAN/I2C/QSPI/UART
Total Internal Ram Size
64KB
# I/os (max)
150
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
3.3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
256
Package Type
MA-BGA
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant
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Chapter 6
ColdFire Flash Module (CFM)
The MCF5282 incorporates SuperFlash® technology licensed from SST. The ColdFire Flash Module
(CFM) is constructed with eight banks of 32K x 16-bit Flash to generate a 512-Kbyte, 32-bit wide
electrically erasable and programmable read-only memory array. The CFM is ideal for program and data
storage for single-chip applications and allows for field reprogramming without external high-voltage
sources.
The voltage required to program and erase the Flash is generated internally by on-chip charge pumps.
Program and erase operations are performed under CPU control through a command-driven interface to
an internal state machine. All Flash physical blocks can be programmed or erased at the same time;
however, it is not possible to read from a Flash physical block while the same block is being programmed
or erased. The array used makes it possible to program or erase one pair of Flash physical blocks under the
control of software routines executing out of another pair.
6.1
Features of the CFM include:
Freescale Semiconductor
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512-Kbytes of Flash memory on the MCF5282 and MCF5216
256-Kbytes of Flash memory on the MCF5281 and MCF5214
Basic Flash access time of 2 clock cycles. Optimized processor Flash interface reduces basic Flash
access time through interleaving and speculative reads.
Automated program and erase operation
Concurrent verify, program, and erase of all array blocks
Read-while-write capability
Optional interrupt on command completion
Flexible scheme for protection against accidental program or erase operations
Access restriction controls for both supervisor/user and data/program space operations
Security for single-chip applications
Single power supply (system V
Auto-sense amplifier timeout for low-power, low-frequency read operations
Features
The MCF5281 and MCF5214 implements only 256 Kbytes of Flash; half
that of the MCF5282 and MCF5216.
The MCF5280 does not contain a Flash module.
Enabling Flash security will disable BDM communications.
When Flash security is enabled, the chip will boot in single-chip mode
regardless of the external reset configuration.
DD
) used for all module operations
NOTE
NOTE
NOTE
6-1
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