MCF5282CVM66 Freescale, MCF5282CVM66 Datasheet - Page 745
MCF5282CVM66
Manufacturer Part Number
MCF5282CVM66
Description
Manufacturer
Freescale
Datasheet
1.MCF5282CVM66.pdf
(766 pages)
Specifications of MCF5282CVM66
Cpu Family
MCF528x
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Interface Type
CAN/I2C/QSPI/UART
Total Internal Ram Size
64KB
# I/os (max)
150
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
3.3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
256
Package Type
MA-BGA
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5282CVM66
Manufacturer:
FREESCAL
Quantity:
152
Company:
Part Number:
MCF5282CVM66
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MCF5282CVM66
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
MCF5282CVM66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
- Current page: 745 of 766
- Download datasheet (11Mb)
Freescale Semiconductor
Table 8-5/Page 8-6 CWCR[CWRI] bit description, change “...is programmed in the interrupt control register 7 (ICR7)...” to “...is
Table 9-4/Page 9-7 In the table for MFD bit definition, footnote (1) equation should read:
10.3.6/Page 10-11
10.3.7/Page 10-16
Section 16.5/Page
Figure 10-6/Page
Table 10-14/Page
Figure 15-1/Page
Table 12-7/Page
Table 10-2/Page
Table 15-1/Page
Table 15-5/Page
Chapter 8
Location
Section
Section
10-15
16-11
10-9
12-7
10-4
15-1
15-3
15-7
Remove any references to the core watchdog timer being able to reset the device. It is only able to
Where f
Include the following text in the section description and as a note in Figure 10-9.
“It is the responsibility of the software to program the ICRnx registers with unique and non-overlapping
Interrupt Force Register Low (INTFRCLn) is illustrated as read-only in the figure. However, this register
Change flag clearing mechanism for sources 24-26. They should read as follows:
Write ERR_INT = 1 after reading ERR_INT = 1
Write BOFF_INT = 1 after reading BOFF_INT = 1
Write WAKE_INT = 1 after reading WAKE_INT = 1
BAM bit field description, the first example should read “So, if CSAR0 = 0x0000 and CSMR0[BAM] =
0x0001” instead of “So, if CSAR0 = 0x0000 and CSMR0[BAM] = 0x0008”.
In footnote, remove mention of the SWIACK register, as it is not supported in the global IACK space.
Change last paragraph to: “In addition to the IACK registers within each interrupt controller, there are
global LnIACK registers. A read from one of the global LnIACK registers returns the vector for the highest
priority unmasked interrupt within a level for all interrupt controllers. There is no global SWIACK register.
However, reading the SWIACK register from each interrupt controller returns the vector number of the
highest priority unmasked request within that controller.”
Change SDRAM address lines from A[31:0] to A[23:0].
NOP command entry. Replace “SRAS asserted” with “SDRAM_CS[1:0] asserted”
Add the following note to the DACRn[CBM] field description:
Note: It is important to set CBM according to the location of the command bit.
Remove last sentence in this section starting with “BCRn decrements...” since SAA bit is not supported.
interrupt the processor. Use the peripheral watchdog timer described in Chapter 18 if needing a
watchdog timer to reset the device.
programmed in the interrupt control register 8 (ICR8)...”
level and priority definitions. Failure to program the ICRnx registers in this manner can result in
undefined behavior. If a specific interrupt request is completely unused, the ICRnx value can remain
in its reset (and disabled) state.”
should be read/write.
sys(max)
Table B-7. Rev. 2.3 to Rev. 3 Changes (continued)
is the maximum system frequency for the particular MCF5282 device (66MHz or 80MHz)
f
sys
=
f
-------------------------------------------- - f
ref
×
2 MFD
2
(
RFD
+
2
)
;
ref
Description
×
2 MFD
(
+
2
)
≤
f
sys max
(
)
;
f
sys
≤
f
sys max
(
)
Revision History
B-9
Related parts for MCF5282CVM66
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Mcf5282 And Mcf5216 Coldfire Microcontroller Users Manual
Manufacturer:
Freescale Semiconductor, Inc
Datasheet:
Part Number:
Description:
TOWER ELEVATOR BOARDS HARDWARE
Manufacturer:
Freescale Semiconductor
Datasheet:
Part Number:
Description:
TOWER SERIAL I/O HARDWARE
Manufacturer:
Freescale Semiconductor
Datasheet:
Part Number:
Description:
LCD MODULE FOR TWR SYSTEM
Manufacturer:
Freescale Semiconductor
Datasheet:
Part Number:
Description:
DAUGHTER LCD WVGA I.MX51
Manufacturer:
Freescale Semiconductor
Datasheet:
Part Number:
Description:
TOWER SYSTEM BOARD MPC5125
Manufacturer:
Freescale Semiconductor
Datasheet:
Part Number:
Description:
KIT EVALUATION I.MX51
Manufacturer:
Freescale Semiconductor
Datasheet:
Part Number:
Description:
KIT DEVELOPMENT WINCE IMX25
Manufacturer:
Freescale Semiconductor
Datasheet:
Part Number:
Description:
TOWER SYSTEM KIT MPC5125
Manufacturer:
Freescale Semiconductor
Datasheet:
Part Number:
Description:
TOWER SYSTEM BOARD K40X256
Manufacturer:
Freescale Semiconductor
Datasheet:
Part Number:
Description:
TOWER SYSTEM KIT K40X256
Manufacturer:
Freescale Semiconductor
Datasheet:
Part Number:
Description:
Microcontrollers (MCU) MX28 PLATFORM DEV KIT
Manufacturer:
Freescale Semiconductor
Datasheet:
Part Number:
Description:
MCU, MPU & DSP Development Tools IAR KickStart Kit for Kinetis K60
Manufacturer:
Freescale Semiconductor
Datasheet:
Part Number:
Description:
24BIT HDMI MX535/08
Manufacturer:
Freescale Semiconductor
Datasheet:
Part Number:
Description:
Manufacturer:
Freescale Semiconductor, Inc
Datasheet: