MCF5282CVM66 Freescale, MCF5282CVM66 Datasheet - Page 662

MCF5282CVM66

Manufacturer Part Number
MCF5282CVM66
Description
Manufacturer
Freescale
Datasheet

Specifications of MCF5282CVM66

Cpu Family
MCF528x
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Interface Type
CAN/I2C/QSPI/UART
Total Internal Ram Size
64KB
# I/os (max)
150
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
3.3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
256
Package Type
MA-BGA
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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Debug Support
The move-to-SR, STLDSR, and RTE instructions include an optional PST = 0x3 value, indicating an entry
into user mode. Additionally, if the execution of a RTE instruction returns the processor to emulator mode,
a multiple-cycle status of 0xD is signaled.
Similar to the exception processing mode, the stopped state (PST = 0xE) and the halted state (PST = 0xF)
display this status throughout the entire time the ColdFire processor is in the given mode.
30-44
Instruction
wdebug
stldsr.w
stop
rte
Table 30-24. PST/DDATA Specification for Supervisor-Mode Instructions
Operand Syntax
<ea>y
#imm
#imm
PST = 0x7, {PST = 0xB, DD = source operand}, {PST = 3}, { PST =0xB,
DD =source operand},
PST = 0x5, {[PST = 0x9AB], DD = target address}
PST = 0x1, {PST = 0xA, DD = destination operand, PST = 0x3}
PST = 0x1,
PST = 0xE
PST = 0x1, {PST = 0xB, DD = source, PST = 0xB, DD = source}
PST/DDATA
Freescale Semiconductor

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