MCF5282CVM66 Freescale, MCF5282CVM66 Datasheet - Page 245

• Manufacturer Part Number: MCF5282CVM66
• Manufacturer: Freescale

Specifications of MCF5282CVM66

• Cpu Family: MCF528x
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Interface Type: CAN/I2C/QSPI/UART
• Total Internal Ram Size: 64KB
• # I/os (max): 150
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 3.3V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: MA-BGA
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

Freescale Semiconductor
Receive data valid
Receive data 0
Carrier receive sense
Transmit data
Transmit error
Receive data
Receive error
QSPI synchronous
serial data output
QSPI synchronous
serial data input
QSPI serial clock
QSPI chip selects
FlexCAN transmit
FlexCAN transmit
Serial clock
Serial data
Transmit serial
data output
Receive serial
data input
Signal Name
Table 14-1. MCF5282 Signal Description (continued)
ERXDV
ERXD0
ECRS
ETXD[3:1]
ETXER
ERXD[3:1]
ERXER
QSPI_DOUT
QSPI_DIN
QSPI_CLK
QSPI_CS[3:0]
CANTX
CANRX
SCL
SDA
UTXD[2:0]
URXD[2:0]
Queued Serial Peripheral Interface (QSPI) Signals
Abbreviation
FlexCAN Signals
UART Signals
Asserted to indicate that the PHY has
Contain the serial output Ethernet
Contain the Ethernet input data
valid nibbles present on the MII.
Ethernet input data transferred from
the PHY to the media access controller
(when ERXDV is asserted).
Asserted to indicate that the transmit
or receive medium is not idle.
data.
Asserted (for one or more E_TXCLKs
while ETXEN is also asserted) to
cause the PHY to send one or more
illegal symbols.
transferred from the PHY to the media
access controller (when ERXDV is
asserted in MII mode).
Indicates (when asserted with
ERXDV) that the PHY has detected an
error in the current frame.
Provides serial data from the QSPI.
Provides serial data to the QSPI.
Provides the serial clock from the
QSPI.
Provide QSPI peripheral chip selects.
Controller area network transmit data.
Controller area network transmit data.
Clock signal for the I
Data input/output for the I
Transmitter serial data outputs.
Receiver serial data inputs.
I
2
C Signals
Function
2
C interface.
2
C interface.
I/O
I/O
I/O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
Signal Descriptions
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