MCF5282CVM66 Freescale, MCF5282CVM66 Datasheet - Page 613
MCF5282CVM66
Manufacturer Part Number
MCF5282CVM66
Description
Manufacturer
Freescale
Datasheet
1.MCF5282CVM66.pdf
(766 pages)
Specifications of MCF5282CVM66
Cpu Family
MCF528x
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Interface Type
CAN/I2C/QSPI/UART
Total Internal Ram Size
64KB
# I/os (max)
150
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
3.3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
256
Package Type
MA-BGA
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant
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29.5
29.5.1
Table 29-5
To protect data integrity, a synchronous reset source is not acted upon by the reset control logic until the
end of the current bus cycle. Reset is then asserted on the next rising edge of the system clock after the
cycle is terminated. Whenever the reset control logic must synchronize reset to the end of the bus cycle,
the internal bus monitor is automatically enabled regardless of the BME bit state in the chip configuration
register (CCR). Then, if the current bus cycle is not terminated normally the bus monitor terminates the
cycle based on the length of time programmed in the BMT field of the CCR.
Internal byte, word, or longword writes are guaranteed to complete without data corruption when a
synchronous reset occurs. External writes, including longword writes to 16-bit ports, are also guaranteed
to complete.
Freescale Semiconductor
Bit(s)
3
2
1
0
Functional Description
Reset Sources
defines the sources of reset and the signals driven by the reset controller.
Power on
External RSTI pin (not stop mode)
External RSTI pin (during stop mode)
Watchdog timer
Loss of clock
Loss of lock
Software
LVD reset
Name
POR
EXT
LOC
LOL
Table 29-4. RSR Field Descriptions (continued)
Power-on reset flag. Indicates that the last reset was caused by a power-on reset.
1 Last reset caused by power-on reset
0 Last reset not caused by power-on reset
External reset flag. Indicates that the last reset was caused by an external device
asserting the external RSTI pin.
1 Last reset state caused by external reset
0 Last reset not caused by external reset
Loss-of-clock reset flag. Indicates that the last reset state was caused by a PLL loss
of clock.
1 Last reset caused by loss of clock
0 Last reset not caused by loss of clock
Loss-of-lock reset flag. Indicates that the last reset state was caused by a PLL loss of
lock.
1 Last reset caused by a loss of lock
0 Last reset not caused by loss of lock
Source
Table 29-5. Reset Source Summary
Asynchronous
Synchronous
Asynchronous
Synchronous
Asynchronous
Asynchronous
Synchronous
Asynchronous
Description
Type
Reset Controller Module
29-5
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