MCF5282CVM66 Freescale, MCF5282CVM66 Datasheet - Page 140

MCF5282CVM66

Manufacturer Part Number
MCF5282CVM66
Description
Manufacturer
Freescale
Datasheet

Specifications of MCF5282CVM66

Cpu Family
MCF528x
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Interface Type
CAN/I2C/QSPI/UART
Total Internal Ram Size
64KB
# I/os (max)
150
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
3.3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
256
Package Type
MA-BGA
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5282CVM66
Manufacturer:
FREESCAL
Quantity:
152
Part Number:
MCF5282CVM66
Manufacturer:
FREESCALE
Quantity:
1 002
Part Number:
MCF5282CVM66
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MCF5282CVM66
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
MCF5282CVM66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Power Management
7.2.3.2
The LPCR controls chip operation and module operation during low-power modes.
7-4
Bits
7–6
4–3
5
2
1
0
Low-Power Control Register (LPCR)
Address
Reset
Field
R/W
STPMD
LVDSE
LPMD
Name
Figure 7-2. Low-Power Control Register (LPCR)
7
LPMD
Low-power mode select. Used to select the low-power mode the chip
enters once the ColdFire CPU executes the STOP instruction. These bits
must be written prior to instruction execution for them to take effect. The
LPMD[1:0] bits are readable and writable in all modes.
the four different power modes that can be configured with the LPMD bit
field.
Reserved, should be cleared.
PLL/CLKOUT stop mode. Controls PLL and CLKOUT operation in stop
mode as shown in
Reserved, should be cleared.
LDV standby enable. Controls whether the PMM enters VREG Standby
Mode (LVD disabled) or VREG Pseudo-Standby (LVD enabled) mode when
the PMM receives a power down request. This bit has no effect if the
RCR[LVDE] bit is a logic 0.
1 VREG Pseudo-Standby mode (LVD enabled on power down request).
0 VREG Standby mode (LVD disabled on power down request).
Reserved, should be cleared.
Table 7-4. LPCR Field Descriptions
Table 7-5. Low-Power Modes
6
LPMD[1:0]
11
10
01
00
5
IPSBAR + 0x0011_0007
Table 7-6
0000_0010
4
STPMD
R/W
Description
3
DOZE
STOP
Mode
WAIT
RUN
2
LVDSE
1
Table 7-5
Freescale Semiconductor
0
illustrates

Related parts for MCF5282CVM66