Z85C3010PSG Zilog, Z85C3010PSG Datasheet - Page 223

• Manufacturer Part Number: Z85C3010PSG
• Description: IC 10MHZ Z8500 CMOS SCC 40-DIP
• Manufacturer: Zilog
• Series: SCCr

Specifications of Z85C3010PSG

• Processor Type: Z80
• Features: Error Detection and Multiprotocol Support
• Speed: 10MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Cpu Speed: 8MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 85
• Rohs Compliant: Yes
• Clock Frequency: 10MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3934; Z85C3010PSG

Application Note
SCC in Binary Synchronous Communications
RECEIVE ROUTINE
RECEIVE A BLOCK OF MESSAGE
THE LAST CHARACTER SHOULD BE EOT (%04)
006C
006C
006C
0070
0072
0074
0076
0078
007A
007C
007E
0080
0082
0084
0086
0088
008A
008C
008E
0090
0092
0094
0096
0098
009A
009C
009E
00A0
00A2
00A4
00A6
6-88
C828
3A86
FE23
6000
00AB
3A86
FE23
2101
FE31
3Cl8
C8C9
3AB6
FE27
2103
5400
3C18
2E38
AB30
0A08
0404
EEFA
3C18
3C18
3A84
FE23
C800
3A86
FE27
9E08
GLOBAL
ENTRY
READ:
! PROCESS CRC ERROR IF ANY, AND GIVE ERROR RESET COMMAND IN WR0A!
END RECEIVE
RECEIVE
LDB
OUTB
LDB
OUTB
LD
INB
LDB
OUTB
LD
INB
LDB
DEC
CPB
JR
INB
INB
INB
LDB
OUTB
RET
PROCEDURE
RL0,#428
WR0A+2,RL0
RL0,%A8
WR0A+2,RL0
Rl,#RR0A+16
RL0,@R1
RL0,#%C9
WR0A+6,RL0
R3,#RBUF
RL0,@R1
@R3,RL0
R3,#l
RL0,#%04
NZ,READ
RL0,@R1
RL0,@R1
RL0,RR0A+2
RL0,#0
WR0A+6,RL0
!WAIT ON RECV.!
!ENABLE WAIT 1ST CHAR,SP.COND. INT!
!READ STX CHARACTER!
!Rx CRC ENABLE!
!READ MESSAGE!
!STORE CHARACTER IN RBUF!
!IS IT END OF TRANSMISSION ?!
!READ PAD1!
!READ PAD2!
!READ CRC STATUS!
!DISABLE RECEIVER!
UM010901-0601